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Support to configure the UTMI+ PHY with an 8- or 16-bit interface via DT. The UTMI+ PHY interface is a hardware capability, and it's platform dependent. Normally, the PHYIF can be configured during coreconsultant. But for some specific USB cores(e.g. rk3399 SoC DWC3), the default PHYIF configuration value is false, so we need to reconfigure it by software. Signed-off-by: William Wu <william.wu@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
46 lines
1.8 KiB
Plaintext
46 lines
1.8 KiB
Plaintext
Generic USB Properties
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Optional properties:
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- maximum-speed: tells USB controllers we want to work up to a certain
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speed. Valid arguments are "super-speed", "high-speed",
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"full-speed" and "low-speed". In case this isn't passed
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via DT, USB controllers should default to their maximum
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HW capability.
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- dr_mode: tells Dual-Role USB controllers that we want to work on a
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particular mode. Valid arguments are "host",
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"peripheral" and "otg". In case this attribute isn't
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passed via DT, USB DRD controllers should default to
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OTG.
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- phy_type: tells USB controllers that we want to configure the core to support
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a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
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selected. Valid arguments are "utmi" and "utmi_wide".
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In case this isn't passed via DT, USB controllers should
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default to HW capability.
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- otg-rev: tells usb driver the release number of the OTG and EH supplement
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with which the device and its descriptors are compliant,
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in binary-coded decimal (i.e. 2.0 is 0200H). This
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property is used if any real OTG features(HNP/SRP/ADP)
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is enabled, if ADP is required, otg-rev should be
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0x0200 or above.
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- hnp-disable: tells OTG controllers we want to disable OTG HNP, normally HNP
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is the basic function of real OTG except you want it
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to be a srp-capable only B device.
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- srp-disable: tells OTG controllers we want to disable OTG SRP, SRP is
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optional for OTG device.
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- adp-disable: tells OTG controllers we want to disable OTG ADP, ADP is
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optional for OTG device.
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This is an attribute to a USB controller such as:
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dwc3@4a030000 {
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compatible = "synopsys,dwc3";
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reg = <0x4a030000 0xcfff>;
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interrupts = <0 92 4>
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usb-phy = <&usb2_phy>, <&usb3,phy>;
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maximum-speed = "super-speed";
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dr_mode = "otg";
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phy_type = "utmi_wide";
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otg-rev = <0x0200>;
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adp-disable;
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};
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