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51821765e8
In the rare case in which one of the clock drivers has divider clocks
but not composite clocks, mtk_clk_simple_probe() would not io(re)map,
hence passing a NULL pointer to mtk_clk_register_dividers().
To fix this issue, extend the `if` conditional to also check if any
divider clocks are present. While at it, also make sure the iomem
pointer is NULL if no composite/divider clocks are declared, as we
are checking for that when iounmapping it in the error path.
This hasn't been seen on any MediaTek clock driver as the current ones
always declare composite clocks along with divider clocks, but this is
still an important fix for a future potential KP.
Fixes: 1fe074b1f1
("clk: mediatek: Add divider clocks to mtk_clk_simple_{probe,remove}()")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230615122051.546985-2-angelogioacchino.delregno@collabora.com
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
672 lines
15 KiB
C
672 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: James Liao <jamesjj.liao@mediatek.com>
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*/
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#include <linux/bitops.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include "clk-mux.h"
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const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };
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EXPORT_SYMBOL_GPL(cg_regs_dummy);
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static int mtk_clk_dummy_enable(struct clk_hw *hw)
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{
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return 0;
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}
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static void mtk_clk_dummy_disable(struct clk_hw *hw) { }
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const struct clk_ops mtk_clk_dummy_ops = {
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.enable = mtk_clk_dummy_enable,
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.disable = mtk_clk_dummy_disable,
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};
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EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops);
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static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
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unsigned int clk_num)
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{
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int i;
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clk_data->num = clk_num;
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for (i = 0; i < clk_num; i++)
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clk_data->hws[i] = ERR_PTR(-ENOENT);
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}
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struct clk_hw_onecell_data *mtk_devm_alloc_clk_data(struct device *dev,
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unsigned int clk_num)
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{
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struct clk_hw_onecell_data *clk_data;
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clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, clk_num),
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GFP_KERNEL);
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if (!clk_data)
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return NULL;
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mtk_init_clk_data(clk_data, clk_num);
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return clk_data;
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}
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EXPORT_SYMBOL_GPL(mtk_devm_alloc_clk_data);
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struct clk_hw_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
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{
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struct clk_hw_onecell_data *clk_data;
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clk_data = kzalloc(struct_size(clk_data, hws, clk_num), GFP_KERNEL);
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if (!clk_data)
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return NULL;
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mtk_init_clk_data(clk_data, clk_num);
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return clk_data;
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}
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EXPORT_SYMBOL_GPL(mtk_alloc_clk_data);
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void mtk_free_clk_data(struct clk_hw_onecell_data *clk_data)
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{
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kfree(clk_data);
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}
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EXPORT_SYMBOL_GPL(mtk_free_clk_data);
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int mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks, int num,
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struct clk_hw_onecell_data *clk_data)
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{
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int i;
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struct clk_hw *hw;
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if (!clk_data)
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return -ENOMEM;
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for (i = 0; i < num; i++) {
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const struct mtk_fixed_clk *rc = &clks[i];
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if (!IS_ERR_OR_NULL(clk_data->hws[rc->id])) {
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pr_warn("Trying to register duplicate clock ID: %d\n", rc->id);
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continue;
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}
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hw = clk_hw_register_fixed_rate(NULL, rc->name, rc->parent, 0,
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rc->rate);
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if (IS_ERR(hw)) {
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pr_err("Failed to register clk %s: %pe\n", rc->name,
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hw);
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goto err;
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}
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clk_data->hws[rc->id] = hw;
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}
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return 0;
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err:
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while (--i >= 0) {
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const struct mtk_fixed_clk *rc = &clks[i];
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if (IS_ERR_OR_NULL(clk_data->hws[rc->id]))
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continue;
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clk_hw_unregister_fixed_rate(clk_data->hws[rc->id]);
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clk_data->hws[rc->id] = ERR_PTR(-ENOENT);
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}
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return PTR_ERR(hw);
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}
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EXPORT_SYMBOL_GPL(mtk_clk_register_fixed_clks);
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void mtk_clk_unregister_fixed_clks(const struct mtk_fixed_clk *clks, int num,
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struct clk_hw_onecell_data *clk_data)
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{
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int i;
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if (!clk_data)
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return;
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for (i = num; i > 0; i--) {
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const struct mtk_fixed_clk *rc = &clks[i - 1];
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if (IS_ERR_OR_NULL(clk_data->hws[rc->id]))
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continue;
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clk_hw_unregister_fixed_rate(clk_data->hws[rc->id]);
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clk_data->hws[rc->id] = ERR_PTR(-ENOENT);
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}
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}
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EXPORT_SYMBOL_GPL(mtk_clk_unregister_fixed_clks);
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int mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num,
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struct clk_hw_onecell_data *clk_data)
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{
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int i;
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struct clk_hw *hw;
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if (!clk_data)
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return -ENOMEM;
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for (i = 0; i < num; i++) {
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const struct mtk_fixed_factor *ff = &clks[i];
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if (!IS_ERR_OR_NULL(clk_data->hws[ff->id])) {
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pr_warn("Trying to register duplicate clock ID: %d\n", ff->id);
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continue;
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}
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hw = clk_hw_register_fixed_factor(NULL, ff->name, ff->parent_name,
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ff->flags, ff->mult, ff->div);
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if (IS_ERR(hw)) {
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pr_err("Failed to register clk %s: %pe\n", ff->name,
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hw);
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goto err;
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}
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clk_data->hws[ff->id] = hw;
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}
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return 0;
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err:
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while (--i >= 0) {
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const struct mtk_fixed_factor *ff = &clks[i];
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if (IS_ERR_OR_NULL(clk_data->hws[ff->id]))
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continue;
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clk_hw_unregister_fixed_factor(clk_data->hws[ff->id]);
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clk_data->hws[ff->id] = ERR_PTR(-ENOENT);
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}
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return PTR_ERR(hw);
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}
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EXPORT_SYMBOL_GPL(mtk_clk_register_factors);
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void mtk_clk_unregister_factors(const struct mtk_fixed_factor *clks, int num,
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struct clk_hw_onecell_data *clk_data)
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{
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int i;
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if (!clk_data)
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return;
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for (i = num; i > 0; i--) {
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const struct mtk_fixed_factor *ff = &clks[i - 1];
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if (IS_ERR_OR_NULL(clk_data->hws[ff->id]))
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continue;
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clk_hw_unregister_fixed_factor(clk_data->hws[ff->id]);
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clk_data->hws[ff->id] = ERR_PTR(-ENOENT);
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}
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}
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EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors);
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static struct clk_hw *mtk_clk_register_composite(struct device *dev,
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const struct mtk_composite *mc, void __iomem *base, spinlock_t *lock)
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{
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struct clk_hw *hw;
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struct clk_mux *mux = NULL;
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struct clk_gate *gate = NULL;
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struct clk_divider *div = NULL;
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struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL;
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const struct clk_ops *mux_ops = NULL, *gate_ops = NULL, *div_ops = NULL;
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const char * const *parent_names;
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const char *parent;
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int num_parents;
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int ret;
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if (mc->mux_shift >= 0) {
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mux = kzalloc(sizeof(*mux), GFP_KERNEL);
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if (!mux)
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return ERR_PTR(-ENOMEM);
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mux->reg = base + mc->mux_reg;
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mux->mask = BIT(mc->mux_width) - 1;
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mux->shift = mc->mux_shift;
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mux->lock = lock;
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mux->flags = mc->mux_flags;
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mux_hw = &mux->hw;
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mux_ops = &clk_mux_ops;
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parent_names = mc->parent_names;
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num_parents = mc->num_parents;
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} else {
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parent = mc->parent;
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parent_names = &parent;
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num_parents = 1;
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}
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if (mc->gate_shift >= 0) {
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gate = kzalloc(sizeof(*gate), GFP_KERNEL);
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if (!gate) {
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ret = -ENOMEM;
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goto err_out;
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}
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gate->reg = base + mc->gate_reg;
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gate->bit_idx = mc->gate_shift;
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gate->flags = CLK_GATE_SET_TO_DISABLE;
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gate->lock = lock;
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gate_hw = &gate->hw;
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gate_ops = &clk_gate_ops;
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}
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if (mc->divider_shift >= 0) {
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div = kzalloc(sizeof(*div), GFP_KERNEL);
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if (!div) {
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ret = -ENOMEM;
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goto err_out;
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}
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div->reg = base + mc->divider_reg;
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div->shift = mc->divider_shift;
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div->width = mc->divider_width;
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div->lock = lock;
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div_hw = &div->hw;
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div_ops = &clk_divider_ops;
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}
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hw = clk_hw_register_composite(dev, mc->name, parent_names, num_parents,
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mux_hw, mux_ops,
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div_hw, div_ops,
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gate_hw, gate_ops,
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mc->flags);
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if (IS_ERR(hw)) {
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ret = PTR_ERR(hw);
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goto err_out;
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}
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return hw;
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err_out:
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kfree(div);
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kfree(gate);
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kfree(mux);
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return ERR_PTR(ret);
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}
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static void mtk_clk_unregister_composite(struct clk_hw *hw)
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{
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struct clk_composite *composite;
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struct clk_mux *mux = NULL;
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struct clk_gate *gate = NULL;
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struct clk_divider *div = NULL;
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if (!hw)
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return;
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composite = to_clk_composite(hw);
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if (composite->mux_hw)
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mux = to_clk_mux(composite->mux_hw);
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if (composite->gate_hw)
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gate = to_clk_gate(composite->gate_hw);
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if (composite->rate_hw)
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div = to_clk_divider(composite->rate_hw);
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clk_hw_unregister_composite(hw);
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kfree(div);
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kfree(gate);
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kfree(mux);
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}
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int mtk_clk_register_composites(struct device *dev,
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const struct mtk_composite *mcs, int num,
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void __iomem *base, spinlock_t *lock,
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struct clk_hw_onecell_data *clk_data)
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{
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struct clk_hw *hw;
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int i;
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if (!clk_data)
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return -ENOMEM;
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for (i = 0; i < num; i++) {
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const struct mtk_composite *mc = &mcs[i];
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if (!IS_ERR_OR_NULL(clk_data->hws[mc->id])) {
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pr_warn("Trying to register duplicate clock ID: %d\n",
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mc->id);
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continue;
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}
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hw = mtk_clk_register_composite(dev, mc, base, lock);
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if (IS_ERR(hw)) {
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pr_err("Failed to register clk %s: %pe\n", mc->name,
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hw);
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goto err;
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}
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clk_data->hws[mc->id] = hw;
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}
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return 0;
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err:
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while (--i >= 0) {
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const struct mtk_composite *mc = &mcs[i];
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if (IS_ERR_OR_NULL(clk_data->hws[mcs->id]))
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continue;
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mtk_clk_unregister_composite(clk_data->hws[mc->id]);
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clk_data->hws[mc->id] = ERR_PTR(-ENOENT);
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}
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return PTR_ERR(hw);
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}
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EXPORT_SYMBOL_GPL(mtk_clk_register_composites);
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void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num,
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struct clk_hw_onecell_data *clk_data)
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{
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int i;
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if (!clk_data)
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return;
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for (i = num; i > 0; i--) {
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const struct mtk_composite *mc = &mcs[i - 1];
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if (IS_ERR_OR_NULL(clk_data->hws[mc->id]))
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continue;
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mtk_clk_unregister_composite(clk_data->hws[mc->id]);
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clk_data->hws[mc->id] = ERR_PTR(-ENOENT);
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}
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}
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EXPORT_SYMBOL_GPL(mtk_clk_unregister_composites);
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int mtk_clk_register_dividers(struct device *dev,
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const struct mtk_clk_divider *mcds, int num,
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void __iomem *base, spinlock_t *lock,
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struct clk_hw_onecell_data *clk_data)
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{
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struct clk_hw *hw;
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int i;
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if (!clk_data)
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return -ENOMEM;
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for (i = 0; i < num; i++) {
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const struct mtk_clk_divider *mcd = &mcds[i];
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if (!IS_ERR_OR_NULL(clk_data->hws[mcd->id])) {
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pr_warn("Trying to register duplicate clock ID: %d\n",
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mcd->id);
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continue;
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}
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hw = clk_hw_register_divider(dev, mcd->name, mcd->parent_name,
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mcd->flags, base + mcd->div_reg, mcd->div_shift,
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mcd->div_width, mcd->clk_divider_flags, lock);
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if (IS_ERR(hw)) {
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pr_err("Failed to register clk %s: %pe\n", mcd->name,
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hw);
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goto err;
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}
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clk_data->hws[mcd->id] = hw;
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}
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return 0;
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err:
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while (--i >= 0) {
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const struct mtk_clk_divider *mcd = &mcds[i];
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if (IS_ERR_OR_NULL(clk_data->hws[mcd->id]))
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continue;
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clk_hw_unregister_divider(clk_data->hws[mcd->id]);
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clk_data->hws[mcd->id] = ERR_PTR(-ENOENT);
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}
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return PTR_ERR(hw);
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}
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EXPORT_SYMBOL_GPL(mtk_clk_register_dividers);
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void mtk_clk_unregister_dividers(const struct mtk_clk_divider *mcds, int num,
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struct clk_hw_onecell_data *clk_data)
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{
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int i;
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if (!clk_data)
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return;
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for (i = num; i > 0; i--) {
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const struct mtk_clk_divider *mcd = &mcds[i - 1];
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if (IS_ERR_OR_NULL(clk_data->hws[mcd->id]))
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continue;
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clk_hw_unregister_divider(clk_data->hws[mcd->id]);
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clk_data->hws[mcd->id] = ERR_PTR(-ENOENT);
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}
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}
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EXPORT_SYMBOL_GPL(mtk_clk_unregister_dividers);
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static int __mtk_clk_simple_probe(struct platform_device *pdev,
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struct device_node *node)
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{
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const struct platform_device_id *id;
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const struct mtk_clk_desc *mcd;
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struct clk_hw_onecell_data *clk_data;
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void __iomem *base = NULL;
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int num_clks, r;
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mcd = device_get_match_data(&pdev->dev);
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if (!mcd) {
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/* Clock driver wasn't registered from devicetree */
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id = platform_get_device_id(pdev);
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if (id)
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mcd = (const struct mtk_clk_desc *)id->driver_data;
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if (!mcd)
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return -EINVAL;
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}
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/* Composite and divider clocks needs us to pass iomem pointer */
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if (mcd->composite_clks || mcd->divider_clks) {
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if (!mcd->shared_io)
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base = devm_platform_ioremap_resource(pdev, 0);
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else
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base = of_iomap(node, 0);
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if (IS_ERR_OR_NULL(base))
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return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM;
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}
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/* Calculate how many clk_hw_onecell_data entries to allocate */
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num_clks = mcd->num_clks + mcd->num_composite_clks;
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num_clks += mcd->num_fixed_clks + mcd->num_factor_clks;
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num_clks += mcd->num_mux_clks + mcd->num_divider_clks;
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|
clk_data = mtk_alloc_clk_data(num_clks);
|
|
if (!clk_data) {
|
|
r = -ENOMEM;
|
|
goto free_base;
|
|
}
|
|
|
|
if (mcd->fixed_clks) {
|
|
r = mtk_clk_register_fixed_clks(mcd->fixed_clks,
|
|
mcd->num_fixed_clks, clk_data);
|
|
if (r)
|
|
goto free_data;
|
|
}
|
|
|
|
if (mcd->factor_clks) {
|
|
r = mtk_clk_register_factors(mcd->factor_clks,
|
|
mcd->num_factor_clks, clk_data);
|
|
if (r)
|
|
goto unregister_fixed_clks;
|
|
}
|
|
|
|
if (mcd->mux_clks) {
|
|
r = mtk_clk_register_muxes(&pdev->dev, mcd->mux_clks,
|
|
mcd->num_mux_clks, node,
|
|
mcd->clk_lock, clk_data);
|
|
if (r)
|
|
goto unregister_factors;
|
|
}
|
|
|
|
if (mcd->composite_clks) {
|
|
/* We don't check composite_lock because it's optional */
|
|
r = mtk_clk_register_composites(&pdev->dev,
|
|
mcd->composite_clks,
|
|
mcd->num_composite_clks,
|
|
base, mcd->clk_lock, clk_data);
|
|
if (r)
|
|
goto unregister_muxes;
|
|
}
|
|
|
|
if (mcd->divider_clks) {
|
|
r = mtk_clk_register_dividers(&pdev->dev,
|
|
mcd->divider_clks,
|
|
mcd->num_divider_clks,
|
|
base, mcd->clk_lock, clk_data);
|
|
if (r)
|
|
goto unregister_composites;
|
|
}
|
|
|
|
if (mcd->clks) {
|
|
r = mtk_clk_register_gates(&pdev->dev, node, mcd->clks,
|
|
mcd->num_clks, clk_data);
|
|
if (r)
|
|
goto unregister_dividers;
|
|
}
|
|
|
|
if (mcd->clk_notifier_func) {
|
|
struct clk *mfg_mux = clk_data->hws[mcd->mfg_clk_idx]->clk;
|
|
|
|
r = mcd->clk_notifier_func(&pdev->dev, mfg_mux);
|
|
if (r)
|
|
goto unregister_clks;
|
|
}
|
|
|
|
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
if (r)
|
|
goto unregister_clks;
|
|
|
|
platform_set_drvdata(pdev, clk_data);
|
|
|
|
if (mcd->rst_desc) {
|
|
r = mtk_register_reset_controller_with_dev(&pdev->dev,
|
|
mcd->rst_desc);
|
|
if (r)
|
|
goto unregister_clks;
|
|
}
|
|
|
|
return r;
|
|
|
|
unregister_clks:
|
|
if (mcd->clks)
|
|
mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
|
|
unregister_dividers:
|
|
if (mcd->divider_clks)
|
|
mtk_clk_unregister_dividers(mcd->divider_clks,
|
|
mcd->num_divider_clks, clk_data);
|
|
unregister_composites:
|
|
if (mcd->composite_clks)
|
|
mtk_clk_unregister_composites(mcd->composite_clks,
|
|
mcd->num_composite_clks, clk_data);
|
|
unregister_muxes:
|
|
if (mcd->mux_clks)
|
|
mtk_clk_unregister_muxes(mcd->mux_clks,
|
|
mcd->num_mux_clks, clk_data);
|
|
unregister_factors:
|
|
if (mcd->factor_clks)
|
|
mtk_clk_unregister_factors(mcd->factor_clks,
|
|
mcd->num_factor_clks, clk_data);
|
|
unregister_fixed_clks:
|
|
if (mcd->fixed_clks)
|
|
mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
|
|
mcd->num_fixed_clks, clk_data);
|
|
free_data:
|
|
mtk_free_clk_data(clk_data);
|
|
free_base:
|
|
if (mcd->shared_io && base)
|
|
iounmap(base);
|
|
return r;
|
|
}
|
|
|
|
static int __mtk_clk_simple_remove(struct platform_device *pdev,
|
|
struct device_node *node)
|
|
{
|
|
struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
|
|
const struct mtk_clk_desc *mcd = device_get_match_data(&pdev->dev);
|
|
|
|
of_clk_del_provider(node);
|
|
if (mcd->clks)
|
|
mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
|
|
if (mcd->divider_clks)
|
|
mtk_clk_unregister_dividers(mcd->divider_clks,
|
|
mcd->num_divider_clks, clk_data);
|
|
if (mcd->composite_clks)
|
|
mtk_clk_unregister_composites(mcd->composite_clks,
|
|
mcd->num_composite_clks, clk_data);
|
|
if (mcd->mux_clks)
|
|
mtk_clk_unregister_muxes(mcd->mux_clks,
|
|
mcd->num_mux_clks, clk_data);
|
|
if (mcd->factor_clks)
|
|
mtk_clk_unregister_factors(mcd->factor_clks,
|
|
mcd->num_factor_clks, clk_data);
|
|
if (mcd->fixed_clks)
|
|
mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
|
|
mcd->num_fixed_clks, clk_data);
|
|
mtk_free_clk_data(clk_data);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int mtk_clk_pdev_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *node = dev->parent->of_node;
|
|
|
|
return __mtk_clk_simple_probe(pdev, node);
|
|
}
|
|
EXPORT_SYMBOL_GPL(mtk_clk_pdev_probe);
|
|
|
|
int mtk_clk_simple_probe(struct platform_device *pdev)
|
|
{
|
|
struct device_node *node = pdev->dev.of_node;
|
|
|
|
return __mtk_clk_simple_probe(pdev, node);
|
|
}
|
|
EXPORT_SYMBOL_GPL(mtk_clk_simple_probe);
|
|
|
|
int mtk_clk_pdev_remove(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *node = dev->parent->of_node;
|
|
|
|
return __mtk_clk_simple_remove(pdev, node);
|
|
}
|
|
EXPORT_SYMBOL_GPL(mtk_clk_pdev_remove);
|
|
|
|
int mtk_clk_simple_remove(struct platform_device *pdev)
|
|
{
|
|
return __mtk_clk_simple_remove(pdev, pdev->dev.of_node);
|
|
}
|
|
EXPORT_SYMBOL_GPL(mtk_clk_simple_remove);
|
|
|
|
MODULE_LICENSE("GPL");
|