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db341d3d51
As can be seen from the datasheet of the CoreSight Components, DDI0314H page A-19 the TPIU has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks in conjunction. The ATCLK is enabled and disabled using the runtime PM callbacks. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
236 lines
5.6 KiB
C
236 lines
5.6 KiB
C
/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/pm_runtime.h>
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#include <linux/coresight.h>
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#include <linux/amba/bus.h>
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#include <linux/clk.h>
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#include "coresight-priv.h"
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#define TPIU_SUPP_PORTSZ 0x000
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#define TPIU_CURR_PORTSZ 0x004
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#define TPIU_SUPP_TRIGMODES 0x100
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#define TPIU_TRIG_CNTRVAL 0x104
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#define TPIU_TRIG_MULT 0x108
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#define TPIU_SUPP_TESTPATM 0x200
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#define TPIU_CURR_TESTPATM 0x204
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#define TPIU_TEST_PATREPCNTR 0x208
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#define TPIU_FFSR 0x300
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#define TPIU_FFCR 0x304
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#define TPIU_FSYNC_CNTR 0x308
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#define TPIU_EXTCTL_INPORT 0x400
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#define TPIU_EXTCTL_OUTPORT 0x404
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#define TPIU_ITTRFLINACK 0xee4
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#define TPIU_ITTRFLIN 0xee8
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#define TPIU_ITATBDATA0 0xeec
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#define TPIU_ITATBCTR2 0xef0
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#define TPIU_ITATBCTR1 0xef4
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#define TPIU_ITATBCTR0 0xef8
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/** register definition **/
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/* FFCR - 0x304 */
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#define FFCR_FON_MAN BIT(6)
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/**
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* @base: memory mapped base address for this component.
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* @dev: the device entity associated to this component.
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* @atclk: optional clock for the core parts of the TPIU.
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* @csdev: component vitals needed by the framework.
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*/
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struct tpiu_drvdata {
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void __iomem *base;
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struct device *dev;
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struct clk *atclk;
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struct coresight_device *csdev;
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};
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static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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/* TODO: fill this up */
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CS_LOCK(drvdata->base);
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}
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static int tpiu_enable(struct coresight_device *csdev)
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{
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struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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pm_runtime_get_sync(csdev->dev.parent);
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tpiu_enable_hw(drvdata);
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dev_info(drvdata->dev, "TPIU enabled\n");
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return 0;
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}
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static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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/* Clear formatter controle reg. */
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writel_relaxed(0x0, drvdata->base + TPIU_FFCR);
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/* Generate manual flush */
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writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
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CS_LOCK(drvdata->base);
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}
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static void tpiu_disable(struct coresight_device *csdev)
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{
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struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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tpiu_disable_hw(drvdata);
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pm_runtime_put(csdev->dev.parent);
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dev_info(drvdata->dev, "TPIU disabled\n");
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}
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static const struct coresight_ops_sink tpiu_sink_ops = {
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.enable = tpiu_enable,
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.disable = tpiu_disable,
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};
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static const struct coresight_ops tpiu_cs_ops = {
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.sink_ops = &tpiu_sink_ops,
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};
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static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
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{
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int ret;
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void __iomem *base;
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struct device *dev = &adev->dev;
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struct coresight_platform_data *pdata = NULL;
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struct tpiu_drvdata *drvdata;
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struct resource *res = &adev->res;
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struct coresight_desc *desc;
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struct device_node *np = adev->dev.of_node;
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if (np) {
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pdata = of_get_coresight_platform_data(dev, np);
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if (IS_ERR(pdata))
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return PTR_ERR(pdata);
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adev->dev.platform_data = pdata;
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}
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drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
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if (!drvdata)
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return -ENOMEM;
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drvdata->dev = &adev->dev;
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drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
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if (!IS_ERR(drvdata->atclk)) {
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ret = clk_prepare_enable(drvdata->atclk);
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if (ret)
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return ret;
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}
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dev_set_drvdata(dev, drvdata);
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/* Validity for the resource is already checked by the AMBA core */
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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drvdata->base = base;
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/* Disable tpiu to support older devices */
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tpiu_disable_hw(drvdata);
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pm_runtime_put(&adev->dev);
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desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
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if (!desc)
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return -ENOMEM;
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desc->type = CORESIGHT_DEV_TYPE_SINK;
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desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
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desc->ops = &tpiu_cs_ops;
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desc->pdata = pdata;
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desc->dev = dev;
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drvdata->csdev = coresight_register(desc);
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if (IS_ERR(drvdata->csdev))
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return PTR_ERR(drvdata->csdev);
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dev_info(dev, "TPIU initialized\n");
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return 0;
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}
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static int tpiu_remove(struct amba_device *adev)
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{
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struct tpiu_drvdata *drvdata = amba_get_drvdata(adev);
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coresight_unregister(drvdata->csdev);
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return 0;
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}
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#ifdef CONFIG_PM
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static int tpiu_runtime_suspend(struct device *dev)
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{
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struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
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if (drvdata && !IS_ERR(drvdata->atclk))
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clk_disable_unprepare(drvdata->atclk);
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return 0;
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}
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static int tpiu_runtime_resume(struct device *dev)
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{
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struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
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if (drvdata && !IS_ERR(drvdata->atclk))
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clk_prepare_enable(drvdata->atclk);
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return 0;
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}
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#endif
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static const struct dev_pm_ops tpiu_dev_pm_ops = {
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SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
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};
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static struct amba_id tpiu_ids[] = {
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{
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.id = 0x0003b912,
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.mask = 0x0003ffff,
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},
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{
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.id = 0x0004b912,
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.mask = 0x0007ffff,
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},
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{ 0, 0},
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};
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static struct amba_driver tpiu_driver = {
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.drv = {
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.name = "coresight-tpiu",
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.owner = THIS_MODULE,
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.pm = &tpiu_dev_pm_ops,
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},
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.probe = tpiu_probe,
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.remove = tpiu_remove,
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.id_table = tpiu_ids,
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};
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module_amba_driver(tpiu_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("CoreSight Trace Port Interface Unit driver");
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