linux/drivers/cxl
Dave Jiang 51293c565c cxl: Fix incorrect region perf data calculation
Current math in cxl_region_perf_data_calculate divides the latency by 1000
every time the function gets called. This causes the region latency to be
divided by 1000 per memory device and the math is incorrect. This is user
visible as the latency access_coordinate exposed via sysfs will show
incorrect latency data.

Normalize values from CDAT to nanoseconds. Adjust sub-nanoseconds latency
to at least 1. Remove adjustment of perf numbers from the generic target
since hmat handling code has already normalized those numbers. Now all
computation and stored numbers should be in nanoseconds.

cxl_hb_get_perf_coordinates() is removed and HB coords are calculated
in the port access_coordinate calculation path since it no longer need
to be treated special.

Fixes: 3d9f4a1972 ("cxl/region: Calculate performance data for a region")
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Link: https://lore.kernel.org/r/20240403154844.3403859-4-dave.jiang@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2024-04-08 08:25:21 -07:00
..
core cxl: Fix incorrect region perf data calculation 2024-04-08 08:25:21 -07:00
acpi.c cxl: Fix incorrect region perf data calculation 2024-04-08 08:25:21 -07:00
cxl.h cxl: Fix incorrect region perf data calculation 2024-04-08 08:25:21 -07:00
cxlmem.h cxl: Change 'struct cxl_memdev_state' *_perf_list to single 'struct cxl_dpa_perf' 2024-02-16 23:20:34 -08:00
cxlpci.h cxl/pci: Get rid of pointer arithmetic reading CDAT table 2024-03-12 23:52:29 -07:00
Kconfig cxl: Add callback to parse the DSMAS subtables from CDAT 2023-12-22 14:33:10 -08:00
Makefile cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation 2022-11-30 16:30:47 -08:00
mem.c cxl: Fix sysfs export of qos_class for memdev 2024-02-16 23:20:34 -08:00
pci.c acpi/ghes: Remove CXL CPER notifications 2024-02-20 22:50:52 -08:00
pmem.c cxl/mbox: Move mailbox related driver state to its own data structure 2023-06-25 14:31:08 -07:00
pmu.h cxl/pci: Find and register CXL PMU devices 2023-05-30 11:20:35 -07:00
port.c cxl: Refactor to use __free() for cxl_root allocation in cxl_endpoint_port_probe() 2024-01-05 14:36:29 -08:00
security.c Merge branch 'for-6.5/cxl-type-2' into for-6.5/cxl 2023-06-25 17:16:51 -07:00