mirror of
https://github.com/torvalds/linux.git
synced 2024-12-27 05:11:48 +00:00
dfab34aa61
Device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRgg+aAAoJEIwa5zzehBx3/q0P/RumfsMePxhmSU4HM16a3w0B 9jg7wd9BxVrJUzTY9F7z+Q72x0u5USUtVnyoY5s68DQMkFyhBQUuKCCiwCqtpCBN 2Uf0JQjYHdqEFKgN6DiPxSVRPXC8jmMzYGRk5RTI5kVWxaBEMdw9rTo0x4vol/Cv 7Z+W+gixXZbgydH/ogqly1MQc9vWliRTfU2zv2WOZ7TLyyEd2lOjMMBIX/n3vI4l T32JOUDgIYK841s9n2eNQGEjqB/OghMMrQsdjUAd++je6QtqgZk9+uHfPFC1C0wQ 3F93te9HleluYcOcxGmedK3B9QO2Y8y1XHe+uxLZVKXBR+6/5AtSwZFRQm10uMCI JUz3j6tRAWDAOin2vXZcf2CVPn5HZbh3D67WuUdfxMngH0XHvSZRC9eRd70jWvDe 9FY4NRTjRSLu/VtgCzF8tSA3cEylhyKYdK6Cf0nbwQ26JTO2VNNCnjuCbRfWp+E1 y0jIQwsaiNLEBwbesNbnFrj+YTTAZBI4+Y5HrSV7Og5/5X9BWs11KAkRppNOj0Uc WnqG26SssuBNBVHPOO2RrOwq3n2VphQ/BB8j9yrpWtcAlQxdjmVqFj/GIIiHr2Wm GuKWgM5fn+xF0oeCriq4Ti5eCJQ7Ev6Er46WrGQDBniZWVi05aP51ks1bfwbfHqn z1o5QfLpr4PkJPk0mnim =8X1b -----END PGP SIGNATURE----- Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree updates from Olof Johansson: "Part 1 of device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits) arm: mvebu: PCIe Device Tree informations for Armada XP GP arm: mvebu: PCIe Device Tree informations for Armada 370 DB arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox arm: mvebu: PCIe Device Tree informations for Armada XP DB arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 arm: mvebu: add PCIe Device Tree informations for Armada XP arm: mvebu: add PCIe Device Tree informations for Armada 370 ARM: sunxi: unify osc24M_fixed and osc24M arm: vt8500: Add SDHC support to WM8505 DT ARM: dts: Add a 64 bits version of the skeleton device tree ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board ARM: mvebu: Add support for NOR flash device on Armada XP-GP board ARM: mvebu: Add Device Bus support for Armada 370/XP SoC ARM: dts: imx6dl-wandboard: Add USB Host support ARM: dts: imx51 cpu node ARM: dts: Add missing imx27-phytec-phycore dtb target ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module ARM: i.MX51: Add PATA support ARM: dts: Add initial support for Wandboard Dual-Lite ...
141 lines
2.6 KiB
Plaintext
141 lines
2.6 KiB
Plaintext
/*
|
|
* Device Tree file for Globalscale Mirabox
|
|
*
|
|
* Gregory CLEMENT <gregory.clement@free-electrons.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
/include/ "armada-370.dtsi"
|
|
|
|
/ {
|
|
model = "Globalscale Mirabox";
|
|
compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200 earlyprintk";
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x20000000>; /* 512 MB */
|
|
};
|
|
|
|
soc {
|
|
internal-regs {
|
|
serial@12000 {
|
|
clock-frequency = <200000000>;
|
|
status = "okay";
|
|
};
|
|
timer@20300 {
|
|
clock-frequency = <600000000>;
|
|
status = "okay";
|
|
};
|
|
|
|
pinctrl {
|
|
pwr_led_pin: pwr-led-pin {
|
|
marvell,pins = "mpp63";
|
|
marvell,function = "gpo";
|
|
};
|
|
|
|
stat_led_pins: stat-led-pins {
|
|
marvell,pins = "mpp64", "mpp65";
|
|
marvell,function = "gpio";
|
|
};
|
|
};
|
|
|
|
gpio_leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pwr_led_pin &stat_led_pins>;
|
|
|
|
green_pwr_led {
|
|
label = "mirabox:green:pwr";
|
|
gpios = <&gpio1 31 1>;
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
|
|
blue_stat_led {
|
|
label = "mirabox:blue:stat";
|
|
gpios = <&gpio2 0 1>;
|
|
linux,default-trigger = "cpu0";
|
|
};
|
|
|
|
green_stat_led {
|
|
label = "mirabox:green:stat";
|
|
gpios = <&gpio2 1 1>;
|
|
default-state = "off";
|
|
};
|
|
};
|
|
|
|
mdio {
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
|
|
phy1: ethernet-phy@1 {
|
|
reg = <1>;
|
|
};
|
|
};
|
|
ethernet@70000 {
|
|
status = "okay";
|
|
phy = <&phy0>;
|
|
phy-mode = "rgmii-id";
|
|
};
|
|
ethernet@74000 {
|
|
status = "okay";
|
|
phy = <&phy1>;
|
|
phy-mode = "rgmii-id";
|
|
};
|
|
|
|
mvsdio@d4000 {
|
|
pinctrl-0 = <&sdio_pins3>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
/*
|
|
* No CD or WP GPIOs: SDIO interface used for
|
|
* Wifi/Bluetooth chip
|
|
*/
|
|
};
|
|
|
|
usb@50000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb@51000 {
|
|
status = "okay";
|
|
};
|
|
|
|
i2c@11000 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
pca9505: pca9505@25 {
|
|
compatible = "nxp,pca9505";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x25>;
|
|
};
|
|
};
|
|
|
|
pcie-controller {
|
|
status = "okay";
|
|
|
|
/* Internal mini-PCIe connector */
|
|
pcie@1,0 {
|
|
/* Port 0, Lane 0 */
|
|
status = "okay";
|
|
};
|
|
|
|
/* Connected on the PCB to a USB 3.0 XHCI controller */
|
|
pcie@2,0 {
|
|
/* Port 1, Lane 0 */
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|