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5019f0b134
The register and irq definitions in mach/*.h for spear3xx and spear6xx are now mostly obsolete, after the platforms have been converted to device tree based probing and the data is now part of the device tree files. The misc_regs.h contents are moved into clock.c because that is the only user, aside from the DMA_CHN_CFG that should eventually get handled differently. Some of the contents of mach/spear.h still remain, because they are used to set up the static map table, timer, uart and auxdata tables, but almost everything got removed. We might remove everything but the map table as the DT conversion completes, but that is not a priority. I've also made sure to make both copies of spear.h more or less identical so we can eventually combine them. The spear3?0.h files were only used by the spear3?0.c files, so I merged the contents in there and removed the bits that were unused. This is something that should still be looked at. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Viresh Kumar <viresh.kumar@st.com>
739 lines
18 KiB
C
739 lines
18 KiB
C
/*
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* arch/arm/mach-spear3xx/spear300.c
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*
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* SPEAr300 machine source file
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*
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* Copyright (C) 2009-2012 ST Microelectronics
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* Viresh Kumar <viresh.kumar@st.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#define pr_fmt(fmt) "SPEAr300: " fmt
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#include <linux/amba/pl08x.h>
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#include <linux/of_platform.h>
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#include <asm/hardware/vic.h>
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#include <asm/mach/arch.h>
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#include <plat/shirq.h>
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#include <mach/generic.h>
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#include <mach/spear.h>
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/* Base address of various IPs */
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#define SPEAR300_TELECOM_BASE UL(0x50000000)
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/* Interrupt registers offsets and masks */
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#define SPEAR300_INT_ENB_MASK_REG 0x54
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#define SPEAR300_INT_STS_MASK_REG 0x58
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#define SPEAR300_IT_PERS_S_IRQ_MASK (1 << 0)
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#define SPEAR300_IT_CHANGE_S_IRQ_MASK (1 << 1)
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#define SPEAR300_I2S_IRQ_MASK (1 << 2)
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#define SPEAR300_TDM_IRQ_MASK (1 << 3)
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#define SPEAR300_CAMERA_L_IRQ_MASK (1 << 4)
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#define SPEAR300_CAMERA_F_IRQ_MASK (1 << 5)
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#define SPEAR300_CAMERA_V_IRQ_MASK (1 << 6)
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#define SPEAR300_KEYBOARD_IRQ_MASK (1 << 7)
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#define SPEAR300_GPIO1_IRQ_MASK (1 << 8)
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#define SPEAR300_SHIRQ_RAS1_MASK 0x1FF
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#define SPEAR300_SOC_CONFIG_BASE UL(0x99000000)
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/* SPEAr300 Virtual irq definitions */
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/* IRQs sharing IRQ_GEN_RAS_1 */
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#define SPEAR300_VIRQ_IT_PERS_S (SPEAR3XX_VIRQ_START + 0)
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#define SPEAR300_VIRQ_IT_CHANGE_S (SPEAR3XX_VIRQ_START + 1)
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#define SPEAR300_VIRQ_I2S (SPEAR3XX_VIRQ_START + 2)
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#define SPEAR300_VIRQ_TDM (SPEAR3XX_VIRQ_START + 3)
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#define SPEAR300_VIRQ_CAMERA_L (SPEAR3XX_VIRQ_START + 4)
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#define SPEAR300_VIRQ_CAMERA_F (SPEAR3XX_VIRQ_START + 5)
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#define SPEAR300_VIRQ_CAMERA_V (SPEAR3XX_VIRQ_START + 6)
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#define SPEAR300_VIRQ_KEYBOARD (SPEAR3XX_VIRQ_START + 7)
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#define SPEAR300_VIRQ_GPIO1 (SPEAR3XX_VIRQ_START + 8)
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/* IRQs sharing IRQ_GEN_RAS_3 */
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#define SPEAR300_IRQ_CLCD SPEAR3XX_IRQ_GEN_RAS_3
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/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
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#define SPEAR300_IRQ_SDHCI SPEAR3XX_IRQ_INTRCOMM_RAS_ARM
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/* pad multiplexing support */
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/* muxing registers */
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#define PAD_MUX_CONFIG_REG 0x00
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#define MODE_CONFIG_REG 0x04
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/* modes */
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#define NAND_MODE (1 << 0)
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#define NOR_MODE (1 << 1)
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#define PHOTO_FRAME_MODE (1 << 2)
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#define LEND_IP_PHONE_MODE (1 << 3)
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#define HEND_IP_PHONE_MODE (1 << 4)
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#define LEND_WIFI_PHONE_MODE (1 << 5)
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#define HEND_WIFI_PHONE_MODE (1 << 6)
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#define ATA_PABX_WI2S_MODE (1 << 7)
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#define ATA_PABX_I2S_MODE (1 << 8)
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#define CAML_LCDW_MODE (1 << 9)
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#define CAMU_LCD_MODE (1 << 10)
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#define CAMU_WLCD_MODE (1 << 11)
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#define CAML_LCD_MODE (1 << 12)
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#define ALL_MODES 0x1FFF
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struct pmx_mode spear300_nand_mode = {
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.id = NAND_MODE,
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.name = "nand mode",
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.mask = 0x00,
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};
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struct pmx_mode spear300_nor_mode = {
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.id = NOR_MODE,
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.name = "nor mode",
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.mask = 0x01,
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};
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struct pmx_mode spear300_photo_frame_mode = {
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.id = PHOTO_FRAME_MODE,
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.name = "photo frame mode",
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.mask = 0x02,
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};
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struct pmx_mode spear300_lend_ip_phone_mode = {
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.id = LEND_IP_PHONE_MODE,
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.name = "lend ip phone mode",
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.mask = 0x03,
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};
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struct pmx_mode spear300_hend_ip_phone_mode = {
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.id = HEND_IP_PHONE_MODE,
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.name = "hend ip phone mode",
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.mask = 0x04,
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};
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struct pmx_mode spear300_lend_wifi_phone_mode = {
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.id = LEND_WIFI_PHONE_MODE,
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.name = "lend wifi phone mode",
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.mask = 0x05,
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};
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struct pmx_mode spear300_hend_wifi_phone_mode = {
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.id = HEND_WIFI_PHONE_MODE,
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.name = "hend wifi phone mode",
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.mask = 0x06,
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};
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struct pmx_mode spear300_ata_pabx_wi2s_mode = {
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.id = ATA_PABX_WI2S_MODE,
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.name = "ata pabx wi2s mode",
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.mask = 0x07,
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};
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struct pmx_mode spear300_ata_pabx_i2s_mode = {
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.id = ATA_PABX_I2S_MODE,
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.name = "ata pabx i2s mode",
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.mask = 0x08,
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};
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struct pmx_mode spear300_caml_lcdw_mode = {
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.id = CAML_LCDW_MODE,
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.name = "caml lcdw mode",
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.mask = 0x0C,
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};
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struct pmx_mode spear300_camu_lcd_mode = {
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.id = CAMU_LCD_MODE,
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.name = "camu lcd mode",
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.mask = 0x0D,
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};
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struct pmx_mode spear300_camu_wlcd_mode = {
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.id = CAMU_WLCD_MODE,
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.name = "camu wlcd mode",
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.mask = 0x0E,
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};
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struct pmx_mode spear300_caml_lcd_mode = {
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.id = CAML_LCD_MODE,
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.name = "caml lcd mode",
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.mask = 0x0F,
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};
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/* devices */
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static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
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{
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.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
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ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
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.mask = PMX_FIRDA_MASK,
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},
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};
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struct pmx_dev spear300_pmx_fsmc_2_chips = {
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.name = "fsmc_2_chips",
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.modes = pmx_fsmc_2_chips_modes,
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.mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
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{
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.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
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ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
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.mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
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},
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};
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struct pmx_dev spear300_pmx_fsmc_4_chips = {
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.name = "fsmc_4_chips",
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.modes = pmx_fsmc_4_chips_modes,
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.mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_keyboard_modes[] = {
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{
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.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
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LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
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CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE |
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CAML_LCD_MODE,
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.mask = 0x0,
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},
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};
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struct pmx_dev spear300_pmx_keyboard = {
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.name = "keyboard",
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.modes = pmx_keyboard_modes,
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.mode_count = ARRAY_SIZE(pmx_keyboard_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_clcd_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE,
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.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
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}, {
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.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
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CAMU_LCD_MODE | CAML_LCD_MODE,
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.mask = PMX_TIMER_3_4_MASK,
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},
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};
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struct pmx_dev spear300_pmx_clcd = {
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.name = "clcd",
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.modes = pmx_clcd_modes,
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.mode_count = ARRAY_SIZE(pmx_clcd_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
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.mask = PMX_MII_MASK,
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}, {
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.ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE,
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.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
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}, {
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.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE,
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.mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,
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}, {
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.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE,
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.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,
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}, {
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.ids = ATA_PABX_WI2S_MODE,
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.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK
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| PMX_UART0_MODEM_MASK,
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},
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};
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struct pmx_dev spear300_pmx_telecom_gpio = {
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.name = "telecom_gpio",
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.modes = pmx_telecom_gpio_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
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HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
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| HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
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| ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
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| CAMU_WLCD_MODE | CAML_LCD_MODE,
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.mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
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},
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};
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struct pmx_dev spear300_pmx_telecom_tdm = {
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.name = "telecom_tdm",
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.modes = pmx_telecom_tdm_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
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{
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.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
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LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
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| ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE |
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CAML_LCDW_MODE | CAML_LCD_MODE,
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.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
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},
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};
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struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = {
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.name = "telecom_spi_cs_i2c_clk",
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.modes = pmx_telecom_spi_cs_i2c_clk_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
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{
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.ids = CAML_LCDW_MODE | CAML_LCD_MODE,
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.mask = PMX_MII_MASK,
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}, {
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.ids = CAMU_LCD_MODE | CAMU_WLCD_MODE,
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.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,
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},
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};
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struct pmx_dev spear300_pmx_telecom_camera = {
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.name = "telecom_camera",
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.modes = pmx_telecom_camera_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
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{
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.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
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| CAMU_WLCD_MODE | CAML_LCD_MODE,
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.mask = PMX_TIMER_1_2_MASK,
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},
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};
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struct pmx_dev spear300_pmx_telecom_dac = {
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.name = "telecom_dac",
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.modes = pmx_telecom_dac_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
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{
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.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
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| LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
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ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
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| CAMU_WLCD_MODE | CAML_LCD_MODE,
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.mask = PMX_UART0_MODEM_MASK,
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},
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};
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struct pmx_dev spear300_pmx_telecom_i2s = {
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.name = "telecom_i2s",
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.modes = pmx_telecom_i2s_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
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{
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.ids = NAND_MODE | NOR_MODE,
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.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
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PMX_TIMER_3_4_MASK,
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},
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};
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struct pmx_dev spear300_pmx_telecom_boot_pins = {
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.name = "telecom_boot_pins",
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.modes = pmx_telecom_boot_pins_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
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HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
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HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
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CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE |
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ATA_PABX_I2S_MODE,
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.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
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PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
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PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
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},
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};
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struct pmx_dev spear300_pmx_telecom_sdhci_4bit = {
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.name = "telecom_sdhci_4bit",
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.modes = pmx_telecom_sdhci_4bit_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
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HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
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HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
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CAMU_WLCD_MODE | CAML_LCD_MODE,
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.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
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PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
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PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
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},
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};
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struct pmx_dev spear300_pmx_telecom_sdhci_8bit = {
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.name = "telecom_sdhci_8bit",
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.modes = pmx_telecom_sdhci_8bit_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_gpio1_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE,
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.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
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PMX_TIMER_3_4_MASK,
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},
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};
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struct pmx_dev spear300_pmx_gpio1 = {
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.name = "arm gpio1",
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.modes = pmx_gpio1_modes,
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.mode_count = ARRAY_SIZE(pmx_gpio1_modes),
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.enb_on_reset = 1,
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};
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/* pmx driver structure */
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static struct pmx_driver pmx_driver = {
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.mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
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.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
|
|
};
|
|
|
|
/* spear3xx shared irq */
|
|
static struct shirq_dev_config shirq_ras1_config[] = {
|
|
{
|
|
.virq = SPEAR300_VIRQ_IT_PERS_S,
|
|
.enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
|
|
.status_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
|
|
}, {
|
|
.virq = SPEAR300_VIRQ_IT_CHANGE_S,
|
|
.enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
|
|
.status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
|
|
}, {
|
|
.virq = SPEAR300_VIRQ_I2S,
|
|
.enb_mask = SPEAR300_I2S_IRQ_MASK,
|
|
.status_mask = SPEAR300_I2S_IRQ_MASK,
|
|
}, {
|
|
.virq = SPEAR300_VIRQ_TDM,
|
|
.enb_mask = SPEAR300_TDM_IRQ_MASK,
|
|
.status_mask = SPEAR300_TDM_IRQ_MASK,
|
|
}, {
|
|
.virq = SPEAR300_VIRQ_CAMERA_L,
|
|
.enb_mask = SPEAR300_CAMERA_L_IRQ_MASK,
|
|
.status_mask = SPEAR300_CAMERA_L_IRQ_MASK,
|
|
}, {
|
|
.virq = SPEAR300_VIRQ_CAMERA_F,
|
|
.enb_mask = SPEAR300_CAMERA_F_IRQ_MASK,
|
|
.status_mask = SPEAR300_CAMERA_F_IRQ_MASK,
|
|
}, {
|
|
.virq = SPEAR300_VIRQ_CAMERA_V,
|
|
.enb_mask = SPEAR300_CAMERA_V_IRQ_MASK,
|
|
.status_mask = SPEAR300_CAMERA_V_IRQ_MASK,
|
|
}, {
|
|
.virq = SPEAR300_VIRQ_KEYBOARD,
|
|
.enb_mask = SPEAR300_KEYBOARD_IRQ_MASK,
|
|
.status_mask = SPEAR300_KEYBOARD_IRQ_MASK,
|
|
}, {
|
|
.virq = SPEAR300_VIRQ_GPIO1,
|
|
.enb_mask = SPEAR300_GPIO1_IRQ_MASK,
|
|
.status_mask = SPEAR300_GPIO1_IRQ_MASK,
|
|
},
|
|
};
|
|
|
|
static struct spear_shirq shirq_ras1 = {
|
|
.irq = SPEAR3XX_IRQ_GEN_RAS_1,
|
|
.dev_config = shirq_ras1_config,
|
|
.dev_count = ARRAY_SIZE(shirq_ras1_config),
|
|
.regs = {
|
|
.enb_reg = SPEAR300_INT_ENB_MASK_REG,
|
|
.status_reg = SPEAR300_INT_STS_MASK_REG,
|
|
.status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK,
|
|
.clear_reg = -1,
|
|
},
|
|
};
|
|
|
|
/* padmux devices to enable */
|
|
static struct pmx_dev *spear300_evb_pmx_devs[] = {
|
|
/* spear3xx specific devices */
|
|
&spear3xx_pmx_i2c,
|
|
&spear3xx_pmx_ssp_cs,
|
|
&spear3xx_pmx_ssp,
|
|
&spear3xx_pmx_mii,
|
|
&spear3xx_pmx_uart0,
|
|
|
|
/* spear300 specific devices */
|
|
&spear300_pmx_fsmc_2_chips,
|
|
&spear300_pmx_clcd,
|
|
&spear300_pmx_telecom_sdhci_4bit,
|
|
&spear300_pmx_gpio1,
|
|
};
|
|
|
|
/* DMAC platform data's slave info */
|
|
struct pl08x_channel_data spear300_dma_info[] = {
|
|
{
|
|
.bus_id = "uart0_rx",
|
|
.min_signal = 2,
|
|
.max_signal = 2,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "uart0_tx",
|
|
.min_signal = 3,
|
|
.max_signal = 3,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ssp0_rx",
|
|
.min_signal = 8,
|
|
.max_signal = 8,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ssp0_tx",
|
|
.min_signal = 9,
|
|
.max_signal = 9,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "i2c_rx",
|
|
.min_signal = 10,
|
|
.max_signal = 10,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "i2c_tx",
|
|
.min_signal = 11,
|
|
.max_signal = 11,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "irda",
|
|
.min_signal = 12,
|
|
.max_signal = 12,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "adc",
|
|
.min_signal = 13,
|
|
.max_signal = 13,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "to_jpeg",
|
|
.min_signal = 14,
|
|
.max_signal = 14,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "from_jpeg",
|
|
.min_signal = 15,
|
|
.max_signal = 15,
|
|
.muxval = 0,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras0_rx",
|
|
.min_signal = 0,
|
|
.max_signal = 0,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras0_tx",
|
|
.min_signal = 1,
|
|
.max_signal = 1,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras1_rx",
|
|
.min_signal = 2,
|
|
.max_signal = 2,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras1_tx",
|
|
.min_signal = 3,
|
|
.max_signal = 3,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras2_rx",
|
|
.min_signal = 4,
|
|
.max_signal = 4,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras2_tx",
|
|
.min_signal = 5,
|
|
.max_signal = 5,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras3_rx",
|
|
.min_signal = 6,
|
|
.max_signal = 6,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras3_tx",
|
|
.min_signal = 7,
|
|
.max_signal = 7,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras4_rx",
|
|
.min_signal = 8,
|
|
.max_signal = 8,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras4_tx",
|
|
.min_signal = 9,
|
|
.max_signal = 9,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras5_rx",
|
|
.min_signal = 10,
|
|
.max_signal = 10,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras5_tx",
|
|
.min_signal = 11,
|
|
.max_signal = 11,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras6_rx",
|
|
.min_signal = 12,
|
|
.max_signal = 12,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras6_tx",
|
|
.min_signal = 13,
|
|
.max_signal = 13,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras7_rx",
|
|
.min_signal = 14,
|
|
.max_signal = 14,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
}, {
|
|
.bus_id = "ras7_tx",
|
|
.min_signal = 15,
|
|
.max_signal = 15,
|
|
.muxval = 1,
|
|
.cctl = 0,
|
|
.periph_buses = PL08X_AHB1,
|
|
},
|
|
};
|
|
|
|
/* Add SPEAr300 auxdata to pass platform data */
|
|
static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
|
|
OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
|
|
&pl022_plat_data),
|
|
OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
|
|
&pl080_plat_data),
|
|
{}
|
|
};
|
|
|
|
static void __init spear300_dt_init(void)
|
|
{
|
|
int ret = -EINVAL;
|
|
|
|
pl080_plat_data.slave_channels = spear300_dma_info;
|
|
pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);
|
|
|
|
of_platform_populate(NULL, of_default_bus_match_table,
|
|
spear300_auxdata_lookup, NULL);
|
|
|
|
/* shared irq registration */
|
|
shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);
|
|
if (shirq_ras1.regs.base) {
|
|
ret = spear_shirq_register(&shirq_ras1);
|
|
if (ret)
|
|
pr_err("Error registering Shared IRQ\n");
|
|
}
|
|
|
|
if (of_machine_is_compatible("st,spear300-evb")) {
|
|
/* pmx initialization */
|
|
pmx_driver.mode = &spear300_photo_frame_mode;
|
|
pmx_driver.devs = spear300_evb_pmx_devs;
|
|
pmx_driver.devs_count = ARRAY_SIZE(spear300_evb_pmx_devs);
|
|
|
|
pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
|
|
if (pmx_driver.base) {
|
|
ret = pmx_register(&pmx_driver);
|
|
if (ret)
|
|
pr_err("padmux: registration failed. err no: %d\n",
|
|
ret);
|
|
/* Free Mapping, device selection already done */
|
|
iounmap(pmx_driver.base);
|
|
}
|
|
|
|
if (ret)
|
|
pr_err("Initialization Failed");
|
|
}
|
|
}
|
|
|
|
static const char * const spear300_dt_board_compat[] = {
|
|
"st,spear300",
|
|
"st,spear300-evb",
|
|
NULL,
|
|
};
|
|
|
|
static void __init spear300_map_io(void)
|
|
{
|
|
spear3xx_map_io();
|
|
spear300_clk_init();
|
|
}
|
|
|
|
DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
|
|
.map_io = spear300_map_io,
|
|
.init_irq = spear3xx_dt_init_irq,
|
|
.handle_irq = vic_handle_irq,
|
|
.timer = &spear3xx_timer,
|
|
.init_machine = spear300_dt_init,
|
|
.restart = spear_restart,
|
|
.dt_compat = spear300_dt_board_compat,
|
|
MACHINE_END
|