mirror of
https://github.com/torvalds/linux.git
synced 2024-12-18 09:02:17 +00:00
320e10986e
Now that its contents were converted to a DT schema, replace the references for the old file on existing properties. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/dfff4d94631546c53450d1baeddc694dd26b5c36.1626608375.git.mchehab+huawei@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
47 lines
1.4 KiB
Plaintext
47 lines
1.4 KiB
Plaintext
* Amazon Annapurna Labs PCIe host bridge
|
|
|
|
Amazon's Annapurna Labs PCIe Host Controller is based on the Synopsys DesignWare
|
|
PCI core. It inherits common properties defined in
|
|
Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
|
|
|
|
Properties of the host controller node that differ from it are:
|
|
|
|
- compatible:
|
|
Usage: required
|
|
Value type: <stringlist>
|
|
Definition: Value should contain
|
|
- "amazon,al-alpine-v2-pcie" for alpine_v2
|
|
- "amazon,al-alpine-v3-pcie" for alpine_v3
|
|
|
|
- reg:
|
|
Usage: required
|
|
Value type: <prop-encoded-array>
|
|
Definition: Register ranges as listed in the reg-names property
|
|
|
|
- reg-names:
|
|
Usage: required
|
|
Value type: <stringlist>
|
|
Definition: Must include the following entries
|
|
- "config" PCIe ECAM space
|
|
- "controller" AL proprietary registers
|
|
- "dbi" Designware PCIe registers
|
|
|
|
Example:
|
|
|
|
pcie-external0: pcie@fb600000 {
|
|
compatible = "amazon,al-alpine-v3-pcie";
|
|
reg = <0x0 0xfb600000 0x0 0x00100000
|
|
0x0 0xfd800000 0x0 0x00010000
|
|
0x0 0xfd810000 0x0 0x00001000>;
|
|
reg-names = "config", "controller", "dbi";
|
|
bus-range = <0 255>;
|
|
device_type = "pci";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
#interrupt-cells = <1>;
|
|
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-map-mask = <0x00 0 0 7>;
|
|
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; /* INTa */
|
|
ranges = <0x02000000 0x0 0xc0010000 0x0 0xc0010000 0x0 0x07ff0000>;
|
|
};
|