mirror of
https://github.com/torvalds/linux.git
synced 2024-12-18 09:02:17 +00:00
aa6eca5b81
There are two independent PCIe controllers in MT2712 and MT7622 platform. Each of them should contain an independent MSI domain. In old dts architecture, MSI domain will be inherited from the root bridge, and all of the devices will share the same MSI domain. Hence that, the PCIe devices will not work properly if the irq number which required is more than 32. Split the PCIe node for MT2712 and MT7622 platform to comply with the hardware design and fix MSI issue. Link: https://lore.kernel.org/r/20210823032800.1660-2-chuanjia.liu@mediatek.com Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh+dt@kernel.org> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
40 lines
783 B
YAML
40 lines
783 B
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/pci/mediatek-pcie-cfg.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: MediaTek PCIECFG controller
|
|
|
|
maintainers:
|
|
- Chuanjia Liu <chuanjia.liu@mediatek.com>
|
|
- Jianjun Wang <jianjun.wang@mediatek.com>
|
|
|
|
description: |
|
|
The MediaTek PCIECFG controller controls some feature about
|
|
LTSSM, ASPM and so on.
|
|
|
|
properties:
|
|
compatible:
|
|
items:
|
|
- enum:
|
|
- mediatek,generic-pciecfg
|
|
- const: syscon
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
pciecfg: pciecfg@1a140000 {
|
|
compatible = "mediatek,generic-pciecfg", "syscon";
|
|
reg = <0x1a140000 0x1000>;
|
|
};
|
|
...
|