linux/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
Piyush Mehta d7f4a65cdf dt-bindings: gpio: zynqmp: Add binding documentation for modepin
This patch adds DT binding document for zynqmp modepin GPIO controller.
Modepin GPIO controller has four GPIO pins which can be configurable
as input or output.

Modepin driver is a bridge between the peripheral driver and GPIO pins.
It has set and get APIs for accessing GPIO pins, based on the device-tree
entry of reset-gpio property in the peripheral driver, every pin can be
configured as input/output and trigger GPIO pin.

For more information please refer zynqMp TRM link:
Link: https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf
Chapter 2: Signals, Interfaces, and Pins
Table 2-2: Clock, Reset, and Configuration Pins - PS_MODE

Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-09-23 10:09:48 +02:00

44 lines
918 B
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: ZynqMP Mode Pin GPIO controller
description:
PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin
GPIO controller with configurable from numbers of pins (from 0 to 3 per
PS_MODE). Every pin can be configured as input/output.
maintainers:
- Piyush Mehta <piyush.mehta@xilinx.com>
properties:
compatible:
const: xlnx,zynqmp-gpio-modepin
gpio-controller: true
"#gpio-cells":
const: 2
required:
- compatible
- gpio-controller
- "#gpio-cells"
additionalProperties: false
examples:
- |
zynqmp-firmware {
gpio {
compatible = "xlnx,zynqmp-gpio-modepin";
gpio-controller;
#gpio-cells = <2>;
};
};
...