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2ec98f5678
Core: - When a gpio_chip request GPIOs from itself, it can now fully control the line characteristics, both machine and consumer flags. This makes a lot of sense, but took some time before I figured out that this is how it has to work. - Several smallish documentation fixes. New drivers: - The PCA953x driver now supports the TI TCA9539. - The DaVinci driver now supports the K3 AM654 SoCs. Driver improvements: - Major overhaul and hardening of the OMAP driver by Russell King. - Starting to move some drivers to the new API passing irq_chip along with the gpio_chip when adding the gpio_chip instead of adding it separately. Unrelated: - Delete the FMC subsystem. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl0i7gEACgkQQRCzN7AZ XXOeUA/+JKyI2zebTWBcgtxhn6VQCufMCtFmQl2JkEcy4pT7aBJcGWqFQCBW2Szf VTtqc8nNa90SZoOzsNbkeQgRjNKGZruMbh0ARUPcW4v3ZJHtUNUEDLTo8c3iyTgS 9k/FTeaTLt4WSZujeAO0O7G4KNnOOlTKLh58dr0PmXUR+0v+fbMhcJqJ9ABueV+V qENdpkTuG1ZcvzgLhBBEXdt3Plw9ICLWmPXtwY+784ewucVPbyQX7jV4+bBZ25fL DerCuMIgL5vRWWdiFO6/Jp603rHzZpTnjLJJocXUFiD6zA5rvU2jTWxsnUttjisg 8cTLMyQspsDvBxhEhCJVTuIKotbKH900TSaz+vx20W72/A1euy4y6uVi8FGZo4Ww KDkzB7anwHyEFKGnlYgHzDrfctgZrhQoyFz808DQRYg1JseZB5oGVDvScrPBD43j nbNDd8gwG4yp3tFnDx9xjIwQy3Ax4d510rAZyUN2801IlbA1bueq4t6Z2cCucWzX XA1gCKlXe4BUeitRAoZtqZNZG1ymEysW4jXy1V8xrwtAf8+QSN+xO98akz3VpnQL ae9q+HtF76fDBY1xFSXT37Ma3+4OR2vMF9QWuo4TCb9j1cL7llf8ZxtUq9LEHbDu erKLSSnwSFmqJNGSEA5SulGOCR/tRPkClngE9x0XEM6gOD+bs6E= =8zSV -----END PGP SIGNATURE----- Merge tag 'gpio-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the big slew of GPIO changes for the v5.3 kernel cycle. This is mostly incremental work this time. Three important things: - The FMC subsystem is deleted through my tree. This happens through GPIO as its demise was discussed in relation to a patch decoupling its GPIO implementation from the standard way of handling GPIO. As it turns out, that is not the only subsystem it reimplements and the authors think it is better do scratch it and start over using the proper kernel subsystems than try to polish the rust shiny. See the commit (ACKed by the maintainers) for details. - Arnd made a small devres patch that was ACKed by Greg and goes into the device core. - SPDX header change colissions may happen, because at times I've seen that quite a lot changed during the -rc:s in regards to SPDX. (It is good stuff, tglx has me convinced, and it is worth the occasional pain.) Apart from this is is nothing controversial or problematic. Summary: Core: - When a gpio_chip request GPIOs from itself, it can now fully control the line characteristics, both machine and consumer flags. This makes a lot of sense, but took some time before I figured out that this is how it has to work. - Several smallish documentation fixes. New drivers: - The PCA953x driver now supports the TI TCA9539. - The DaVinci driver now supports the K3 AM654 SoCs. Driver improvements: - Major overhaul and hardening of the OMAP driver by Russell King. - Starting to move some drivers to the new API passing irq_chip along with the gpio_chip when adding the gpio_chip instead of adding it separately. Unrelated: - Delete the FMC subsystem" * tag 'gpio-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (87 commits) Revert "gpio: tegra: Clean-up debugfs initialisation" gpiolib: Use spinlock_t instead of struct spinlock gpio: stp-xway: allow compile-testing gpio: stp-xway: get rid of the #include <lantiq_soc.h> dependency gpio: stp-xway: improve module clock error handling gpio: stp-xway: simplify error handling in xway_stp_probe() gpiolib: Clarify use of non-sleeping functions gpiolib: Fix references to gpiod_[gs]et_*value_cansleep() variants gpiolib: Document new gpio_chip.init_valid_mask field Documentation: gpio: Fix reference to gpiod_get_array() gpio: pl061: drop duplicate printing of device name gpio: altera: Pass irqchip when adding gpiochip gpio: siox: Use devm_ managed gpiochip gpio: siox: Add struct device *dev helper variable gpio: siox: Pass irqchip when adding gpiochip drivers: gpio: amd-fch: make resource struct const devres: allow const resource arguments gpio: ath79: Pass irqchip when adding gpiochip gpio: tegra: Clean-up debugfs initialisation gpio: siox: Switch to IRQ_TYPE_NONE ...
299 lines
8.2 KiB
C
299 lines
8.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright (C) 2012 John Crispin <john@phrozen.org>
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*/
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/of_platform.h>
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#include <linux/mutex.h>
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#include <linux/gpio/driver.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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/*
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* The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a
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* peripheral controller used to drive external shift register cascades. At most
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* 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
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* to drive the 2 LSBs of the cascade automatically.
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*/
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/* control register 0 */
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#define XWAY_STP_CON0 0x00
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/* control register 1 */
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#define XWAY_STP_CON1 0x04
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/* data register 0 */
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#define XWAY_STP_CPU0 0x08
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/* data register 1 */
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#define XWAY_STP_CPU1 0x0C
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/* access register */
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#define XWAY_STP_AR 0x10
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/* software or hardware update select bit */
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#define XWAY_STP_CON_SWU BIT(31)
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/* automatic update rates */
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#define XWAY_STP_2HZ 0
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#define XWAY_STP_4HZ BIT(23)
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#define XWAY_STP_8HZ BIT(24)
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#define XWAY_STP_10HZ (BIT(24) | BIT(23))
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#define XWAY_STP_SPEED_MASK (0xf << 23)
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/* clock source for automatic update */
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#define XWAY_STP_UPD_FPI BIT(31)
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#define XWAY_STP_UPD_MASK (BIT(31) | BIT(30))
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/* let the adsl core drive the 2 LSBs */
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#define XWAY_STP_ADSL_SHIFT 24
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#define XWAY_STP_ADSL_MASK 0x3
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/* 2 groups of 3 bits can be driven by the phys */
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#define XWAY_STP_PHY_MASK 0x7
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#define XWAY_STP_PHY1_SHIFT 27
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#define XWAY_STP_PHY2_SHIFT 15
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/* STP has 3 groups of 8 bits */
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#define XWAY_STP_GROUP0 BIT(0)
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#define XWAY_STP_GROUP1 BIT(1)
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#define XWAY_STP_GROUP2 BIT(2)
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#define XWAY_STP_GROUP_MASK (0x7)
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/* Edge configuration bits */
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#define XWAY_STP_FALLING BIT(26)
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#define XWAY_STP_EDGE_MASK BIT(26)
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#define xway_stp_r32(m, reg) __raw_readl(m + reg)
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#define xway_stp_w32(m, val, reg) __raw_writel(val, m + reg)
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#define xway_stp_w32_mask(m, clear, set, reg) \
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xway_stp_w32(m, (xway_stp_r32(m, reg) & ~(clear)) | (set), reg)
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struct xway_stp {
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struct gpio_chip gc;
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void __iomem *virt;
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u32 edge; /* rising or falling edge triggered shift register */
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u32 shadow; /* shadow the shift registers state */
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u8 groups; /* we can drive 1-3 groups of 8bit each */
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u8 dsl; /* the 2 LSBs can be driven by the dsl core */
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u8 phy1; /* 3 bits can be driven by phy1 */
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u8 phy2; /* 3 bits can be driven by phy2 */
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u8 reserved; /* mask out the hw driven bits in gpio_request */
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};
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/**
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* xway_stp_get() - gpio_chip->get - get gpios.
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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*
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* Gets the shadow value.
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*/
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static int xway_stp_get(struct gpio_chip *gc, unsigned int gpio)
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{
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struct xway_stp *chip = gpiochip_get_data(gc);
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return (xway_stp_r32(chip->virt, XWAY_STP_CPU0) & BIT(gpio));
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}
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/**
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* xway_stp_set() - gpio_chip->set - set gpios.
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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* @val: Value to be written to specified signal.
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*
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* Set the shadow value and call ltq_ebu_apply.
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*/
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static void xway_stp_set(struct gpio_chip *gc, unsigned gpio, int val)
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{
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struct xway_stp *chip = gpiochip_get_data(gc);
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if (val)
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chip->shadow |= BIT(gpio);
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else
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chip->shadow &= ~BIT(gpio);
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xway_stp_w32(chip->virt, chip->shadow, XWAY_STP_CPU0);
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xway_stp_w32_mask(chip->virt, 0, XWAY_STP_CON_SWU, XWAY_STP_CON0);
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}
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/**
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* xway_stp_dir_out() - gpio_chip->dir_out - set gpio direction.
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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* @val: Value to be written to specified signal.
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*
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* Same as xway_stp_set, always returns 0.
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*/
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static int xway_stp_dir_out(struct gpio_chip *gc, unsigned gpio, int val)
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{
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xway_stp_set(gc, gpio, val);
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return 0;
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}
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/**
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* xway_stp_request() - gpio_chip->request
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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*
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* We mask out the HW driven pins
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*/
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static int xway_stp_request(struct gpio_chip *gc, unsigned gpio)
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{
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struct xway_stp *chip = gpiochip_get_data(gc);
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if ((gpio < 8) && (chip->reserved & BIT(gpio))) {
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dev_err(gc->parent, "GPIO %d is driven by hardware\n", gpio);
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return -ENODEV;
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}
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return 0;
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}
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/**
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* xway_stp_hw_init() - Configure the STP unit and enable the clock gate
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* @chip: Pointer to the xway_stp chip structure
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*/
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static void xway_stp_hw_init(struct xway_stp *chip)
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{
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/* sane defaults */
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xway_stp_w32(chip->virt, 0, XWAY_STP_AR);
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xway_stp_w32(chip->virt, 0, XWAY_STP_CPU0);
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xway_stp_w32(chip->virt, 0, XWAY_STP_CPU1);
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xway_stp_w32(chip->virt, XWAY_STP_CON_SWU, XWAY_STP_CON0);
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xway_stp_w32(chip->virt, 0, XWAY_STP_CON1);
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/* apply edge trigger settings for the shift register */
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xway_stp_w32_mask(chip->virt, XWAY_STP_EDGE_MASK,
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chip->edge, XWAY_STP_CON0);
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/* apply led group settings */
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xway_stp_w32_mask(chip->virt, XWAY_STP_GROUP_MASK,
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chip->groups, XWAY_STP_CON1);
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/* tell the hardware which pins are controlled by the dsl modem */
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xway_stp_w32_mask(chip->virt,
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XWAY_STP_ADSL_MASK << XWAY_STP_ADSL_SHIFT,
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chip->dsl << XWAY_STP_ADSL_SHIFT,
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XWAY_STP_CON0);
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/* tell the hardware which pins are controlled by the phys */
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xway_stp_w32_mask(chip->virt,
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XWAY_STP_PHY_MASK << XWAY_STP_PHY1_SHIFT,
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chip->phy1 << XWAY_STP_PHY1_SHIFT,
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XWAY_STP_CON0);
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xway_stp_w32_mask(chip->virt,
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XWAY_STP_PHY_MASK << XWAY_STP_PHY2_SHIFT,
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chip->phy2 << XWAY_STP_PHY2_SHIFT,
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XWAY_STP_CON1);
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/* mask out the hw driven bits in gpio_request */
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chip->reserved = (chip->phy2 << 5) | (chip->phy1 << 2) | chip->dsl;
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/*
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* if we have pins that are driven by hw, we need to tell the stp what
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* clock to use as a timer.
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*/
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if (chip->reserved)
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xway_stp_w32_mask(chip->virt, XWAY_STP_UPD_MASK,
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XWAY_STP_UPD_FPI, XWAY_STP_CON1);
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}
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static int xway_stp_probe(struct platform_device *pdev)
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{
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u32 shadow, groups, dsl, phy;
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struct xway_stp *chip;
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struct clk *clk;
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int ret = 0;
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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chip->virt = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(chip->virt))
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return PTR_ERR(chip->virt);
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chip->gc.parent = &pdev->dev;
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chip->gc.label = "stp-xway";
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chip->gc.direction_output = xway_stp_dir_out;
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chip->gc.get = xway_stp_get;
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chip->gc.set = xway_stp_set;
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chip->gc.request = xway_stp_request;
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chip->gc.base = -1;
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chip->gc.owner = THIS_MODULE;
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/* store the shadow value if one was passed by the devicetree */
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if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow))
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chip->shadow = shadow;
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/* find out which gpio groups should be enabled */
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if (!of_property_read_u32(pdev->dev.of_node, "lantiq,groups", &groups))
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chip->groups = groups & XWAY_STP_GROUP_MASK;
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else
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chip->groups = XWAY_STP_GROUP0;
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chip->gc.ngpio = fls(chip->groups) * 8;
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/* find out which gpios are controlled by the dsl core */
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if (!of_property_read_u32(pdev->dev.of_node, "lantiq,dsl", &dsl))
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chip->dsl = dsl & XWAY_STP_ADSL_MASK;
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/* find out which gpios are controlled by the phys */
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if (of_machine_is_compatible("lantiq,ar9") ||
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of_machine_is_compatible("lantiq,gr9") ||
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of_machine_is_compatible("lantiq,vr9")) {
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if (!of_property_read_u32(pdev->dev.of_node, "lantiq,phy1", &phy))
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chip->phy1 = phy & XWAY_STP_PHY_MASK;
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if (!of_property_read_u32(pdev->dev.of_node, "lantiq,phy2", &phy))
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chip->phy2 = phy & XWAY_STP_PHY_MASK;
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}
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/* check which edge trigger we should use, default to a falling edge */
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if (!of_find_property(pdev->dev.of_node, "lantiq,rising", NULL))
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chip->edge = XWAY_STP_FALLING;
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clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "Failed to get clock\n");
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return PTR_ERR(clk);
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}
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ret = clk_prepare_enable(clk);
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if (ret)
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return ret;
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xway_stp_hw_init(chip);
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ret = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip);
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if (ret) {
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clk_disable_unprepare(clk);
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return ret;
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}
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dev_info(&pdev->dev, "Init done\n");
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return 0;
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}
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static const struct of_device_id xway_stp_match[] = {
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{ .compatible = "lantiq,gpio-stp-xway" },
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{},
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};
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MODULE_DEVICE_TABLE(of, xway_stp_match);
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static struct platform_driver xway_stp_driver = {
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.probe = xway_stp_probe,
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.driver = {
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.name = "gpio-stp-xway",
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.of_match_table = xway_stp_match,
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},
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};
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static int __init xway_stp_init(void)
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{
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return platform_driver_register(&xway_stp_driver);
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}
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subsys_initcall(xway_stp_init);
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