Vineet Gupta 6732c0e494 ARC: mm: retire support for aliasing VIPT D$ ... Legacy ARC700 processors (first generation of MMU enabled ARC cores) had VIPT cached which could be configured such that they could alias. Corresponding support in kernel (with all the obnoxious cache flush overhead) was added in ARC port 10 years ago to support 1 silicon. That is long bygone and we can let it RIP. Cc: Matthew Wilcox (Oracle) <willy@infradead.org> Signed-off-by: Vineet Gupta <vgupta@kernel.org>		2023-12-08 16:30:24 -08:00
..
cache.c	ARC: mm: retire support for aliasing VIPT D$	2023-12-08 16:30:24 -08:00
dma.c	arc: Replace lkml.org links with lore	2021-12-28 19:48:49 -08:00
extable.c	ARC: uaccess: remove arc specific out-of-line handles for -Os	2023-08-17 12:40:26 -07:00
fault.c	ARC: pt_regs: create seperate type for ecr	2023-08-18 10:30:47 -07:00
highmem.c	arc/mm/highmem: Use generic kmap atomic implementation	2020-11-06 23:14:55 +01:00
init.c	ARC: -Wmissing-prototype warning fixes	2023-08-13 16:53:02 -07:00
ioremap.c	arc: mm: convert to GENERIC_IOREMAP	2023-08-18 10:12:33 -07:00
Makefile	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
mmap.c	ARC: mm: retire support for aliasing VIPT D$	2023-12-08 16:30:24 -08:00
tlb.c	ARC: mm: retire support for aliasing VIPT D$	2023-12-08 16:30:24 -08:00
tlbex.S	ARC: mm: support 4 levels of page tables	2021-08-26 13:43:19 -07:00