mirror of
https://github.com/torvalds/linux.git
synced 2024-12-27 05:11:48 +00:00
4e965ede18
Move specific features settings from EP shared code (pcie-designware-ep.c) to the driver (pcie-designware-plat.c). Previous implementation disables the EP link notification by default for all SoCs that uses EP DesignWare IP, which affects directly the dra7xx and artpec6 SoCs. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> |
||
|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| pci-dra7xx.c | ||
| pci-exynos.c | ||
| pci-imx6.c | ||
| pci-keystone-dw.c | ||
| pci-keystone.c | ||
| pci-keystone.h | ||
| pci-layerscape.c | ||
| pcie-armada8k.c | ||
| pcie-artpec6.c | ||
| pcie-designware-ep.c | ||
| pcie-designware-host.c | ||
| pcie-designware-plat.c | ||
| pcie-designware.c | ||
| pcie-designware.h | ||
| pcie-hisi.c | ||
| pcie-histb.c | ||
| pcie-kirin.c | ||
| pcie-qcom.c | ||
| pcie-spear13xx.c | ||