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bc487fb341
Commit ab69bcd66f (arm: remove
machine_desc.io_pg_offst and .phys_io) could not update
the new boards in the omap tree. This causes the build of
omap2plus_defconfig to fail. Fix this.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Eric Miao <eric.miao at canonical.com>
[tony@atomide.com: updated description]
Signed-off-by: Tony Lindgren <tony@atomide.com>
401 lines
10 KiB
C
401 lines
10 KiB
C
/*
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* Copyright (C) 2010 - ISEE 2007 SL
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*
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* Modified from mach-omap2/board-generic.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/interrupt.h>
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#include <linux/regulator/machine.h>
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#include <linux/i2c/twl.h>
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#include <linux/mmc/host.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <plat/board.h>
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#include <plat/common.h>
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#include <plat/gpmc.h>
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#include <plat/usb.h>
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#include <plat/onenand.h>
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#include "mux.h"
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#include "hsmmc.h"
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#include "sdram-numonyx-m65kxxxxam.h"
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#define IGEP3_GPIO_LED0_GREEN 54
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#define IGEP3_GPIO_LED0_RED 53
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#define IGEP3_GPIO_LED1_RED 16
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#define IGEP3_GPIO_WIFI_NPD 138
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#define IGEP3_GPIO_WIFI_NRESET 139
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#define IGEP3_GPIO_BT_NRESET 137
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#define IGEP3_GPIO_USBH_NRESET 115
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#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
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defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
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#define ONENAND_MAP 0x20000000
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/*
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* x2 Flash built-in COMBO POP MEMORY
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* Since the device is equipped with two DataRAMs, and two-plane NAND
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* Flash memory array, these two component enables simultaneous program
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* of 4KiB. Plane1 has only even blocks such as block0, block2, block4
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* while Plane2 has only odd blocks such as block1, block3, block5.
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* So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)
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*/
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static struct mtd_partition igep3_onenand_partitions[] = {
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{
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.name = "X-Loader",
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.offset = 0,
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.size = 2 * (64*(2*2048))
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},
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{
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.name = "U-Boot",
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.offset = MTDPART_OFS_APPEND,
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.size = 6 * (64*(2*2048)),
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},
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{
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.name = "Environment",
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.offset = MTDPART_OFS_APPEND,
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.size = 2 * (64*(2*2048)),
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},
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{
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.name = "Kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = 12 * (64*(2*2048)),
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},
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{
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.name = "File System",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct omap_onenand_platform_data igep3_onenand_pdata = {
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.parts = igep3_onenand_partitions,
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.nr_parts = ARRAY_SIZE(igep3_onenand_partitions),
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.onenand_setup = NULL,
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.dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
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};
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static struct platform_device igep3_onenand_device = {
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.name = "omap2-onenand",
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.id = -1,
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.dev = {
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.platform_data = &igep3_onenand_pdata,
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},
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};
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void __init igep3_flash_init(void)
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{
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u8 cs = 0;
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u8 onenandcs = GPMC_CS_NUM + 1;
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for (cs = 0; cs < GPMC_CS_NUM; cs++) {
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u32 ret;
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ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
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/* Check if NAND/oneNAND is configured */
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if ((ret & 0xC00) == 0x800)
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/* NAND found */
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pr_err("IGEP3: Unsupported NAND found\n");
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else {
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ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
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if ((ret & 0x3F) == (ONENAND_MAP >> 24))
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/* OneNAND found */
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onenandcs = cs;
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}
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}
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if (onenandcs > GPMC_CS_NUM) {
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pr_err("IGEP3: Unable to find configuration in GPMC\n");
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return;
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}
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igep3_onenand_pdata.cs = onenandcs;
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if (platform_device_register(&igep3_onenand_device) < 0)
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pr_err("IGEP3: Unable to register OneNAND device\n");
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}
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#else
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void __init igep3_flash_init(void) {}
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#endif
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static struct regulator_consumer_supply igep3_vmmc1_supply = {
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.supply = "vmmc",
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};
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/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
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static struct regulator_init_data igep3_vmmc1 = {
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.constraints = {
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.min_uV = 1850000,
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.max_uV = 3150000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = 1,
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.consumer_supplies = &igep3_vmmc1_supply,
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};
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static struct omap2_hsmmc_info mmc[] = {
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[0] = {
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.mmc = 1,
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.caps = MMC_CAP_4_BIT_DATA,
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.gpio_cd = -EINVAL,
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.gpio_wp = -EINVAL,
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},
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#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
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[1] = {
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.mmc = 2,
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.caps = MMC_CAP_4_BIT_DATA,
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.gpio_cd = -EINVAL,
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.gpio_wp = -EINVAL,
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},
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#endif
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{} /* Terminator */
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};
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#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
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#include <linux/leds.h>
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static struct gpio_led igep3_gpio_leds[] = {
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[0] = {
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.name = "gpio-led:red:d0",
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.gpio = IGEP3_GPIO_LED0_RED,
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.default_trigger = "default-off"
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},
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[1] = {
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.name = "gpio-led:green:d0",
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.gpio = IGEP3_GPIO_LED0_GREEN,
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.default_trigger = "default-off",
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},
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[2] = {
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.name = "gpio-led:red:d1",
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.gpio = IGEP3_GPIO_LED1_RED,
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.default_trigger = "default-off",
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},
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[3] = {
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.name = "gpio-led:green:d1",
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.default_trigger = "heartbeat",
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.gpio = -EINVAL, /* gets replaced */
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},
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};
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static struct gpio_led_platform_data igep3_led_pdata = {
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.leds = igep3_gpio_leds,
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.num_leds = ARRAY_SIZE(igep3_gpio_leds),
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};
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static struct platform_device igep3_led_device = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &igep3_led_pdata,
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},
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};
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static void __init igep3_leds_init(void)
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{
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platform_device_register(&igep3_led_device);
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}
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#else
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static inline void igep3_leds_init(void)
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{
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if ((gpio_request(IGEP3_GPIO_LED0_RED, "gpio-led:red:d0") == 0) &&
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(gpio_direction_output(IGEP3_GPIO_LED0_RED, 1) == 0)) {
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gpio_export(IGEP3_GPIO_LED0_RED, 0);
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gpio_set_value(IGEP3_GPIO_LED0_RED, 1);
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} else
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pr_warning("IGEP3: Could not obtain gpio GPIO_LED0_RED\n");
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if ((gpio_request(IGEP3_GPIO_LED0_GREEN, "gpio-led:green:d0") == 0) &&
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(gpio_direction_output(IGEP3_GPIO_LED0_GREEN, 1) == 0)) {
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gpio_export(IGEP3_GPIO_LED0_GREEN, 0);
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gpio_set_value(IGEP3_GPIO_LED0_GREEN, 1);
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} else
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pr_warning("IGEP3: Could not obtain gpio GPIO_LED0_GREEN\n");
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if ((gpio_request(IGEP3_GPIO_LED1_RED, "gpio-led:red:d1") == 0) &&
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(gpio_direction_output(IGEP3_GPIO_LED1_RED, 1) == 0)) {
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gpio_export(IGEP3_GPIO_LED1_RED, 0);
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gpio_set_value(IGEP3_GPIO_LED1_RED, 1);
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} else
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pr_warning("IGEP3: Could not obtain gpio GPIO_LED1_RED\n");
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}
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#endif
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static int igep3_twl4030_gpio_setup(struct device *dev,
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unsigned gpio, unsigned ngpio)
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{
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/* gpio + 0 is "mmc0_cd" (input/IRQ) */
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mmc[0].gpio_cd = gpio + 0;
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omap2_hsmmc_init(mmc);
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/*
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* link regulators to MMC adapters ... we "know" the
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* regulators will be set up only *after* we return.
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*/
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igep3_vmmc1_supply.dev = mmc[0].dev;
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/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
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#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE)
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if ((gpio_request(gpio+TWL4030_GPIO_MAX+1, "gpio-led:green:d1") == 0)
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&& (gpio_direction_output(gpio + TWL4030_GPIO_MAX + 1, 1) == 0)) {
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gpio_export(gpio + TWL4030_GPIO_MAX + 1, 0);
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gpio_set_value(gpio + TWL4030_GPIO_MAX + 1, 0);
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} else
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pr_warning("IGEP3: Could not obtain gpio GPIO_LED1_GREEN\n");
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#else
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igep3_gpio_leds[3].gpio = gpio + TWL4030_GPIO_MAX + 1;
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#endif
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return 0;
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};
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static struct twl4030_gpio_platform_data igep3_twl4030_gpio_pdata = {
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.gpio_base = OMAP_MAX_GPIO_LINES,
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.irq_base = TWL4030_GPIO_IRQ_BASE,
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.irq_end = TWL4030_GPIO_IRQ_END,
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.use_leds = true,
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.setup = igep3_twl4030_gpio_setup,
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};
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static struct twl4030_usb_data igep3_twl4030_usb_data = {
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.usb_mode = T2_USB_MODE_ULPI,
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};
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static void __init igep3_init_irq(void)
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{
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omap2_init_common_hw(m65kxxxxam_sdrc_params, m65kxxxxam_sdrc_params);
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omap_init_irq();
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omap_gpio_init();
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}
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static struct twl4030_platform_data igep3_twl4030_pdata = {
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.irq_base = TWL4030_IRQ_BASE,
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.irq_end = TWL4030_IRQ_END,
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/* platform_data for children goes here */
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.usb = &igep3_twl4030_usb_data,
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.gpio = &igep3_twl4030_gpio_pdata,
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.vmmc1 = &igep3_vmmc1,
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};
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static struct i2c_board_info __initdata igep3_i2c_boardinfo[] = {
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{
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I2C_BOARD_INFO("twl4030", 0x48),
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.flags = I2C_CLIENT_WAKE,
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.irq = INT_34XX_SYS_NIRQ,
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.platform_data = &igep3_twl4030_pdata,
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},
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};
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static int __init igep3_i2c_init(void)
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{
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omap_register_i2c_bus(1, 2600, igep3_i2c_boardinfo,
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ARRAY_SIZE(igep3_i2c_boardinfo));
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return 0;
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}
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static struct omap_musb_board_data musb_board_data = {
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.interface_type = MUSB_INTERFACE_ULPI,
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.mode = MUSB_OTG,
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.power = 100,
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};
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#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
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static void __init igep3_wifi_bt_init(void)
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{
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/* Configure MUX values for W-LAN + Bluetooth GPIO's */
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omap_mux_init_gpio(IGEP3_GPIO_WIFI_NPD, OMAP_PIN_OUTPUT);
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omap_mux_init_gpio(IGEP3_GPIO_WIFI_NRESET, OMAP_PIN_OUTPUT);
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omap_mux_init_gpio(IGEP3_GPIO_BT_NRESET, OMAP_PIN_OUTPUT);
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/* Set GPIO's for W-LAN + Bluetooth combo module */
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if ((gpio_request(IGEP3_GPIO_WIFI_NPD, "GPIO_WIFI_NPD") == 0) &&
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(gpio_direction_output(IGEP3_GPIO_WIFI_NPD, 1) == 0)) {
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gpio_export(IGEP3_GPIO_WIFI_NPD, 0);
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} else
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pr_warning("IGEP3: Could not obtain gpio GPIO_WIFI_NPD\n");
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if ((gpio_request(IGEP3_GPIO_WIFI_NRESET, "GPIO_WIFI_NRESET") == 0) &&
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(gpio_direction_output(IGEP3_GPIO_WIFI_NRESET, 1) == 0)) {
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gpio_export(IGEP3_GPIO_WIFI_NRESET, 0);
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gpio_set_value(IGEP3_GPIO_WIFI_NRESET, 0);
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udelay(10);
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gpio_set_value(IGEP3_GPIO_WIFI_NRESET, 1);
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} else
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pr_warning("IGEP3: Could not obtain gpio GPIO_WIFI_NRESET\n");
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if ((gpio_request(IGEP3_GPIO_BT_NRESET, "GPIO_BT_NRESET") == 0) &&
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(gpio_direction_output(IGEP3_GPIO_BT_NRESET, 1) == 0)) {
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gpio_export(IGEP3_GPIO_BT_NRESET, 0);
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} else
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pr_warning("IGEP3: Could not obtain gpio GPIO_BT_NRESET\n");
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}
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#else
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void __init igep3_wifi_bt_init(void) {}
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#endif
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#ifdef CONFIG_OMAP_MUX
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static struct omap_board_mux board_mux[] __initdata = {
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{ .reg_offset = OMAP_MUX_TERMINATOR },
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};
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#else
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#define board_mux NULL
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#endif
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static void __init igep3_init(void)
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{
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omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
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/* Register I2C busses and drivers */
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igep3_i2c_init();
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omap_serial_init();
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usb_musb_init(&musb_board_data);
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igep3_flash_init();
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igep3_leds_init();
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/*
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* WLAN-BT combo module from MuRata wich has a Marvell WLAN
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* (88W8686) + CSR Bluetooth chipset. Uses SDIO interface.
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*/
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igep3_wifi_bt_init();
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}
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MACHINE_START(IGEP0030, "IGEP OMAP3 module")
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.boot_params = 0x80000100,
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.map_io = omap3_map_io,
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.init_irq = igep3_init_irq,
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.init_machine = igep3_init,
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.timer = &omap_timer,
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MACHINE_END
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