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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
235 lines
6.3 KiB
C
235 lines
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Routines for GF1 DMA control
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* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
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*/
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#include <asm/dma.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/gus.h>
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static void snd_gf1_dma_ack(struct snd_gus_card * gus)
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{
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unsigned long flags;
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spin_lock_irqsave(&gus->reg_lock, flags);
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snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, 0x00);
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snd_gf1_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL);
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spin_unlock_irqrestore(&gus->reg_lock, flags);
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}
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static void snd_gf1_dma_program(struct snd_gus_card * gus,
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unsigned int addr,
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unsigned long buf_addr,
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unsigned int count,
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unsigned int cmd)
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{
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unsigned long flags;
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unsigned int address;
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unsigned char dma_cmd;
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unsigned int address_high;
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snd_printdd("dma_transfer: addr=0x%x, buf=0x%lx, count=0x%x\n",
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addr, buf_addr, count);
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if (gus->gf1.dma1 > 3) {
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if (gus->gf1.enh_mode) {
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address = addr >> 1;
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} else {
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if (addr & 0x1f) {
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snd_printd("snd_gf1_dma_transfer: unaligned address (0x%x)?\n", addr);
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return;
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}
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address = (addr & 0x000c0000) | ((addr & 0x0003ffff) >> 1);
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}
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} else {
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address = addr;
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}
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dma_cmd = SNDRV_GF1_DMA_ENABLE | (unsigned short) cmd;
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#if 0
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dma_cmd |= 0x08;
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#endif
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if (dma_cmd & SNDRV_GF1_DMA_16BIT) {
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count++;
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count &= ~1; /* align */
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}
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if (gus->gf1.dma1 > 3) {
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dma_cmd |= SNDRV_GF1_DMA_WIDTH16;
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count++;
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count &= ~1; /* align */
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}
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snd_gf1_dma_ack(gus);
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snd_dma_program(gus->gf1.dma1, buf_addr, count, dma_cmd & SNDRV_GF1_DMA_READ ? DMA_MODE_READ : DMA_MODE_WRITE);
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#if 0
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snd_printk(KERN_DEBUG "address = 0x%x, count = 0x%x, dma_cmd = 0x%x\n",
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address << 1, count, dma_cmd);
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#endif
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spin_lock_irqsave(&gus->reg_lock, flags);
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if (gus->gf1.enh_mode) {
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address_high = ((address >> 16) & 0x000000f0) | (address & 0x0000000f);
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snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
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snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH, (unsigned char) address_high);
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} else
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snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
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snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, dma_cmd);
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spin_unlock_irqrestore(&gus->reg_lock, flags);
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}
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static struct snd_gf1_dma_block *snd_gf1_dma_next_block(struct snd_gus_card * gus)
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{
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struct snd_gf1_dma_block *block;
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/* PCM block have bigger priority than synthesizer one */
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if (gus->gf1.dma_data_pcm) {
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block = gus->gf1.dma_data_pcm;
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if (gus->gf1.dma_data_pcm_last == block) {
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gus->gf1.dma_data_pcm =
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gus->gf1.dma_data_pcm_last = NULL;
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} else {
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gus->gf1.dma_data_pcm = block->next;
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}
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} else if (gus->gf1.dma_data_synth) {
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block = gus->gf1.dma_data_synth;
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if (gus->gf1.dma_data_synth_last == block) {
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gus->gf1.dma_data_synth =
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gus->gf1.dma_data_synth_last = NULL;
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} else {
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gus->gf1.dma_data_synth = block->next;
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}
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} else {
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block = NULL;
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}
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if (block) {
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gus->gf1.dma_ack = block->ack;
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gus->gf1.dma_private_data = block->private_data;
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}
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return block;
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}
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static void snd_gf1_dma_interrupt(struct snd_gus_card * gus)
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{
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struct snd_gf1_dma_block *block;
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snd_gf1_dma_ack(gus);
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if (gus->gf1.dma_ack)
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gus->gf1.dma_ack(gus, gus->gf1.dma_private_data);
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spin_lock(&gus->dma_lock);
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if (gus->gf1.dma_data_pcm == NULL &&
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gus->gf1.dma_data_synth == NULL) {
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gus->gf1.dma_ack = NULL;
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gus->gf1.dma_flags &= ~SNDRV_GF1_DMA_TRIGGER;
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spin_unlock(&gus->dma_lock);
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return;
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}
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block = snd_gf1_dma_next_block(gus);
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spin_unlock(&gus->dma_lock);
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snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
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kfree(block);
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#if 0
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snd_printd(KERN_DEBUG "program dma (IRQ) - "
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"addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n",
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block->addr, block->buf_addr, block->count, block->cmd);
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#endif
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}
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int snd_gf1_dma_init(struct snd_gus_card * gus)
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{
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mutex_lock(&gus->dma_mutex);
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gus->gf1.dma_shared++;
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if (gus->gf1.dma_shared > 1) {
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mutex_unlock(&gus->dma_mutex);
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return 0;
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}
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gus->gf1.interrupt_handler_dma_write = snd_gf1_dma_interrupt;
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gus->gf1.dma_data_pcm =
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gus->gf1.dma_data_pcm_last =
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gus->gf1.dma_data_synth =
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gus->gf1.dma_data_synth_last = NULL;
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mutex_unlock(&gus->dma_mutex);
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return 0;
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}
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int snd_gf1_dma_done(struct snd_gus_card * gus)
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{
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struct snd_gf1_dma_block *block;
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mutex_lock(&gus->dma_mutex);
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gus->gf1.dma_shared--;
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if (!gus->gf1.dma_shared) {
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snd_dma_disable(gus->gf1.dma1);
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snd_gf1_set_default_handlers(gus, SNDRV_GF1_HANDLER_DMA_WRITE);
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snd_gf1_dma_ack(gus);
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while ((block = gus->gf1.dma_data_pcm)) {
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gus->gf1.dma_data_pcm = block->next;
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kfree(block);
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}
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while ((block = gus->gf1.dma_data_synth)) {
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gus->gf1.dma_data_synth = block->next;
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kfree(block);
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}
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gus->gf1.dma_data_pcm_last =
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gus->gf1.dma_data_synth_last = NULL;
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}
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mutex_unlock(&gus->dma_mutex);
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return 0;
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}
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int snd_gf1_dma_transfer_block(struct snd_gus_card * gus,
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struct snd_gf1_dma_block * __block,
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int atomic,
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int synth)
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{
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unsigned long flags;
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struct snd_gf1_dma_block *block;
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block = kmalloc(sizeof(*block), atomic ? GFP_ATOMIC : GFP_KERNEL);
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if (!block)
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return -ENOMEM;
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*block = *__block;
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block->next = NULL;
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snd_printdd("addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n",
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block->addr, (long) block->buffer, block->count,
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block->cmd);
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snd_printdd("gus->gf1.dma_data_pcm_last = 0x%lx\n",
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(long)gus->gf1.dma_data_pcm_last);
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snd_printdd("gus->gf1.dma_data_pcm = 0x%lx\n",
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(long)gus->gf1.dma_data_pcm);
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spin_lock_irqsave(&gus->dma_lock, flags);
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if (synth) {
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if (gus->gf1.dma_data_synth_last) {
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gus->gf1.dma_data_synth_last->next = block;
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gus->gf1.dma_data_synth_last = block;
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} else {
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gus->gf1.dma_data_synth =
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gus->gf1.dma_data_synth_last = block;
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}
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} else {
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if (gus->gf1.dma_data_pcm_last) {
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gus->gf1.dma_data_pcm_last->next = block;
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gus->gf1.dma_data_pcm_last = block;
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} else {
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gus->gf1.dma_data_pcm =
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gus->gf1.dma_data_pcm_last = block;
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}
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}
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if (!(gus->gf1.dma_flags & SNDRV_GF1_DMA_TRIGGER)) {
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gus->gf1.dma_flags |= SNDRV_GF1_DMA_TRIGGER;
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block = snd_gf1_dma_next_block(gus);
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spin_unlock_irqrestore(&gus->dma_lock, flags);
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if (block == NULL)
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return 0;
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snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
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kfree(block);
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return 0;
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}
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spin_unlock_irqrestore(&gus->dma_lock, flags);
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return 0;
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}
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