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Since LD_ABS/LD_IND instructions are now removed from the core and reimplemented through a combination of inlined BPF instructions and a slow-path helper, we can get rid of the complexity from ppc64 JIT. Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Acked-by: Alexei Starovoitov <ast@kernel.org> Tested-by: Sandipan Das <sandipan@linux.vnet.ibm.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
93 lines
2.4 KiB
C
93 lines
2.4 KiB
C
/*
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* bpf_jit64.h: BPF JIT compiler for PPC64
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*
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* Copyright 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
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* IBM Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#ifndef _BPF_JIT64_H
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#define _BPF_JIT64_H
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#include "bpf_jit.h"
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/*
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* Stack layout:
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* Ensure the top half (upto local_tmp_var) stays consistent
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* with our redzone usage.
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*
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* [ prev sp ] <-------------
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* [ nv gpr save area ] 6*8 |
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* [ tail_call_cnt ] 8 |
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* [ local_tmp_var ] 8 |
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* fp (r31) --> [ ebpf stack space ] upto 512 |
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* [ frame header ] 32/112 |
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* sp (r1) ---> [ stack pointer ] --------------
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*/
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/* for gpr non volatile registers BPG_REG_6 to 10 */
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#define BPF_PPC_STACK_SAVE (6*8)
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/* for bpf JIT code internal usage */
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#define BPF_PPC_STACK_LOCALS 16
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/* stack frame excluding BPF stack, ensure this is quadword aligned */
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#define BPF_PPC_STACKFRAME (STACK_FRAME_MIN_SIZE + \
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BPF_PPC_STACK_LOCALS + BPF_PPC_STACK_SAVE)
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#ifndef __ASSEMBLY__
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/* BPF register usage */
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#define TMP_REG_1 (MAX_BPF_JIT_REG + 0)
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#define TMP_REG_2 (MAX_BPF_JIT_REG + 1)
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/* BPF to ppc register mappings */
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static const int b2p[] = {
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/* function return value */
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[BPF_REG_0] = 8,
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/* function arguments */
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[BPF_REG_1] = 3,
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[BPF_REG_2] = 4,
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[BPF_REG_3] = 5,
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[BPF_REG_4] = 6,
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[BPF_REG_5] = 7,
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/* non volatile registers */
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[BPF_REG_6] = 27,
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[BPF_REG_7] = 28,
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[BPF_REG_8] = 29,
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[BPF_REG_9] = 30,
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/* frame pointer aka BPF_REG_10 */
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[BPF_REG_FP] = 31,
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/* eBPF jit internal registers */
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[BPF_REG_AX] = 2,
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[TMP_REG_1] = 9,
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[TMP_REG_2] = 10
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};
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/* PPC NVR range -- update this if we ever use NVRs below r27 */
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#define BPF_PPC_NVR_MIN 27
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#define SEEN_FUNC 0x1000 /* might call external helpers */
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#define SEEN_STACK 0x2000 /* uses BPF stack */
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#define SEEN_TAILCALL 0x4000 /* uses tail calls */
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struct codegen_context {
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/*
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* This is used to track register usage as well
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* as calls to external helpers.
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* - register usage is tracked with corresponding
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* bits (r3-r10 and r27-r31)
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* - rest of the bits can be used to track other
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* things -- for now, we use bits 16 to 23
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* encoded in SEEN_* macros above
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*/
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unsigned int seen;
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unsigned int idx;
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unsigned int stack_size;
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};
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#endif /* !__ASSEMBLY__ */
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#endif
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