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0167509574
Defer the unmasking of the count/compare interrupt (IRQ5) till the clockevent driver initialization: - only enable the cascaded IRQs 0 thru 4 in arch_init_irq(); kill the ALLINTS macro -- this change is blessed by AMD as I saw it in their own patch; :-) - do not force IRQ5 enabled in plat_time_init() if PM is enabled and there's no 32 KHz crystal. Update the copyrights (taking into account my prior changes), also removing Pete Popov's old email... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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au1xxx_dbdma.h | ||
au1xxx_ide.h | ||
au1xxx_psc.h | ||
au1xxx.h | ||
au1000_dma.h | ||
au1000_gpio.h | ||
au1000.h | ||
au1100_mmc.h | ||
au1550_spi.h | ||
gpio.h | ||
ioremap.h | ||
prom.h | ||
war.h |