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f2f6c2556d
Modify of_clk_init function so that it will determine which driver to initialize based on device tree instead of each driver registering to it. Based on a similar patch for drivers/irqchip by Thomas Petazzoni and drivers/clocksource by Stephen Warren. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Tony Prisk <linux@prisktech.co.nz> Tested-by: Pawel Moll <pawel.moll@arm.com> Tested-by: Rob Herring <rob.herring@calxeda.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com> Reviewed-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Maxime Ripard <maxime.ripard@anandra.org> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: merge conflict from missing CLKSRC_OF_TABLES()] Signed-off-by: Mike Turquette <mturquette@linaro.org>
106 lines
2.9 KiB
C
106 lines
2.9 KiB
C
/*
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* Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
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* Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Fixed rate clock implementation
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/of.h>
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/*
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* DOC: basic fixed-rate clock that cannot gate
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*
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* Traits of this clock:
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* prepare - clk_(un)prepare only ensures parents are prepared
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* enable - clk_enable only ensures parents are enabled
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* rate - rate is always a fixed value. No clk_set_rate support
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* parent - fixed parent. No clk_set_parent support
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*/
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#define to_clk_fixed_rate(_hw) container_of(_hw, struct clk_fixed_rate, hw)
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static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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return to_clk_fixed_rate(hw)->fixed_rate;
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}
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const struct clk_ops clk_fixed_rate_ops = {
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.recalc_rate = clk_fixed_rate_recalc_rate,
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};
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EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
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/**
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* clk_register_fixed_rate - register fixed-rate clock with the clock framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_name: name of clock's parent
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* @flags: framework-specific flags
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* @fixed_rate: non-adjustable clock rate
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*/
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struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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unsigned long fixed_rate)
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{
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struct clk_fixed_rate *fixed;
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struct clk *clk;
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struct clk_init_data init;
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/* allocate fixed-rate clock */
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fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL);
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if (!fixed) {
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pr_err("%s: could not allocate fixed clk\n", __func__);
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return ERR_PTR(-ENOMEM);
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}
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init.name = name;
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init.ops = &clk_fixed_rate_ops;
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init.flags = flags | CLK_IS_BASIC;
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init.parent_names = (parent_name ? &parent_name: NULL);
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init.num_parents = (parent_name ? 1 : 0);
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/* struct clk_fixed_rate assignments */
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fixed->fixed_rate = fixed_rate;
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fixed->hw.init = &init;
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/* register the clock */
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clk = clk_register(dev, &fixed->hw);
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if (IS_ERR(clk))
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kfree(fixed);
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return clk;
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}
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#ifdef CONFIG_OF
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/**
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* of_fixed_clk_setup() - Setup function for simple fixed rate clock
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*/
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void of_fixed_clk_setup(struct device_node *node)
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{
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struct clk *clk;
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const char *clk_name = node->name;
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u32 rate;
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if (of_property_read_u32(node, "clock-frequency", &rate))
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return;
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of_property_read_string(node, "clock-output-names", &clk_name);
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clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, rate);
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if (!IS_ERR(clk))
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of_clk_add_provider(node, of_clk_src_simple_get, clk);
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}
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EXPORT_SYMBOL_GPL(of_fixed_clk_setup);
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CLK_OF_DECLARE(fixed_clk, "fixed-clock", of_fixed_clk_setup);
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#endif
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