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A NV49 appeared a while back that was using the "nv41 style" pwm registers, rather than the "nv40 style" ones my board is using. This disproves the previous theory that the pwm controller choice is chipset-specific. So, after looking at a bunch of vbios images it appears that the next viable theory is that we should select the pwm controller to use based on the gpio line the fan is tied to, just like we do on nv50. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
86 lines
3.4 KiB
C
86 lines
3.4 KiB
C
/*
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* Copyright 2010 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#ifndef __NOUVEAU_PM_H__
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#define __NOUVEAU_PM_H__
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/* nouveau_pm.c */
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int nouveau_pm_init(struct drm_device *dev);
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void nouveau_pm_fini(struct drm_device *dev);
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void nouveau_pm_resume(struct drm_device *dev);
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/* nouveau_volt.c */
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void nouveau_volt_init(struct drm_device *);
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void nouveau_volt_fini(struct drm_device *);
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int nouveau_volt_vid_lookup(struct drm_device *, int voltage);
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int nouveau_volt_lvl_lookup(struct drm_device *, int vid);
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int nouveau_voltage_gpio_get(struct drm_device *);
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int nouveau_voltage_gpio_set(struct drm_device *, int voltage);
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/* nouveau_perf.c */
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void nouveau_perf_init(struct drm_device *);
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void nouveau_perf_fini(struct drm_device *);
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/* nouveau_mem.c */
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void nouveau_mem_timing_init(struct drm_device *);
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void nouveau_mem_timing_fini(struct drm_device *);
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/* nv04_pm.c */
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int nv04_pm_clock_get(struct drm_device *, u32 id);
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void *nv04_pm_clock_pre(struct drm_device *, struct nouveau_pm_level *,
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u32 id, int khz);
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void nv04_pm_clock_set(struct drm_device *, void *);
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/* nv40_pm.c */
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int nv40_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
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void *nv40_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
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void nv40_pm_clocks_set(struct drm_device *, void *);
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int nv40_pm_pwm_get(struct drm_device *, struct dcb_gpio_entry *, u32*, u32*);
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int nv40_pm_pwm_set(struct drm_device *, struct dcb_gpio_entry *, u32, u32);
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/* nv50_pm.c */
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int nv50_pm_clock_get(struct drm_device *, u32 id);
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void *nv50_pm_clock_pre(struct drm_device *, struct nouveau_pm_level *,
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u32 id, int khz);
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void nv50_pm_clock_set(struct drm_device *, void *);
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int nv50_pm_pwm_get(struct drm_device *, struct dcb_gpio_entry *, u32*, u32*);
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int nv50_pm_pwm_set(struct drm_device *, struct dcb_gpio_entry *, u32, u32);
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/* nva3_pm.c */
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int nva3_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
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void *nva3_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
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void nva3_pm_clocks_set(struct drm_device *, void *);
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/* nvc0_pm.c */
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int nvc0_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
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/* nouveau_temp.c */
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void nouveau_temp_init(struct drm_device *dev);
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void nouveau_temp_fini(struct drm_device *dev);
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void nouveau_temp_safety_checks(struct drm_device *dev);
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int nv40_temp_get(struct drm_device *dev);
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int nv84_temp_get(struct drm_device *dev);
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#endif
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