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f0545078e1
Add the module clock used by the PWM Timers on the Renesas R-Car H1 (R8A7779) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1397b517fccbe716a71cfae770512ed577730a25.1679329211.git.geert+renesas@glider.be
62 lines
1.4 KiB
C
62 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2013 Horms Solutions Ltd.
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*
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* Contact: Simon Horman <horms@verge.net.au>
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7779_H__
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#define __DT_BINDINGS_CLOCK_R8A7779_H__
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/* CPG */
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#define R8A7779_CLK_PLLA 0
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#define R8A7779_CLK_Z 1
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#define R8A7779_CLK_ZS 2
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#define R8A7779_CLK_S 3
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#define R8A7779_CLK_S1 4
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#define R8A7779_CLK_P 5
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#define R8A7779_CLK_B 6
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#define R8A7779_CLK_OUT 7
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/* MSTP 0 */
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#define R8A7779_CLK_PWM 5
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#define R8A7779_CLK_HSPI 7
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#define R8A7779_CLK_TMU2 14
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#define R8A7779_CLK_TMU1 15
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#define R8A7779_CLK_TMU0 16
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#define R8A7779_CLK_HSCIF1 18
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#define R8A7779_CLK_HSCIF0 19
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#define R8A7779_CLK_SCIF5 21
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#define R8A7779_CLK_SCIF4 22
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#define R8A7779_CLK_SCIF3 23
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#define R8A7779_CLK_SCIF2 24
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#define R8A7779_CLK_SCIF1 25
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#define R8A7779_CLK_SCIF0 26
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#define R8A7779_CLK_I2C3 27
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#define R8A7779_CLK_I2C2 28
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#define R8A7779_CLK_I2C1 29
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#define R8A7779_CLK_I2C0 30
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/* MSTP 1 */
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#define R8A7779_CLK_USB01 0
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#define R8A7779_CLK_USB2 1
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#define R8A7779_CLK_DU 3
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#define R8A7779_CLK_VIN2 8
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#define R8A7779_CLK_VIN1 9
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#define R8A7779_CLK_VIN0 10
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#define R8A7779_CLK_ETHER 14
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#define R8A7779_CLK_SATA 15
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#define R8A7779_CLK_PCIE 16
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#define R8A7779_CLK_VIN3 20
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/* MSTP 3 */
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#define R8A7779_CLK_SDHI3 20
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#define R8A7779_CLK_SDHI2 21
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#define R8A7779_CLK_SDHI1 22
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#define R8A7779_CLK_SDHI0 23
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#define R8A7779_CLK_MMC1 30
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#define R8A7779_CLK_MMC0 31
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#endif /* __DT_BINDINGS_CLOCK_R8A7779_H__ */
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