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4ab969199e
When one vcpu wants to kick another, it can issue a special IPI instruction called msgsnd. This patch emulates this instruction, its clearing counterpart and the infrastructure required to actually trigger that interrupt inside a guest vcpu. With this patch, SMP guests on e500mc work. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
314 lines
7.3 KiB
C
314 lines
7.3 KiB
C
/*
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* Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu, <yu.liu@freescale.com>
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*
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* Description:
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* This file is derived from arch/powerpc/kvm/44x_emulate.c,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <asm/kvm_ppc.h>
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#include <asm/disassemble.h>
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#include <asm/dbell.h>
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#include "booke.h"
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#include "e500.h"
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#define XOP_MSGSND 206
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#define XOP_MSGCLR 238
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#define XOP_TLBIVAX 786
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#define XOP_TLBSX 914
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#define XOP_TLBRE 946
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#define XOP_TLBWE 978
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#define XOP_TLBILX 18
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#ifdef CONFIG_KVM_E500MC
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static int dbell2prio(ulong param)
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{
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int msg = param & PPC_DBELL_TYPE_MASK;
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int prio = -1;
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switch (msg) {
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case PPC_DBELL_TYPE(PPC_DBELL):
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prio = BOOKE_IRQPRIO_DBELL;
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break;
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case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
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prio = BOOKE_IRQPRIO_DBELL_CRIT;
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break;
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default:
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break;
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}
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return prio;
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}
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static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
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{
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ulong param = vcpu->arch.gpr[rb];
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int prio = dbell2prio(param);
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if (prio < 0)
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return EMULATE_FAIL;
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clear_bit(prio, &vcpu->arch.pending_exceptions);
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return EMULATE_DONE;
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}
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static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
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{
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ulong param = vcpu->arch.gpr[rb];
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int prio = dbell2prio(rb);
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int pir = param & PPC_DBELL_PIR_MASK;
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int i;
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struct kvm_vcpu *cvcpu;
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if (prio < 0)
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return EMULATE_FAIL;
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kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
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int cpir = cvcpu->arch.shared->pir;
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if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
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set_bit(prio, &cvcpu->arch.pending_exceptions);
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kvm_vcpu_kick(cvcpu);
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}
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}
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return EMULATE_DONE;
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}
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#endif
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int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int inst, int *advance)
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{
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int emulated = EMULATE_DONE;
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int ra;
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int rb;
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int rt;
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switch (get_op(inst)) {
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case 31:
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switch (get_xop(inst)) {
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#ifdef CONFIG_KVM_E500MC
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case XOP_MSGSND:
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emulated = kvmppc_e500_emul_msgsnd(vcpu, get_rb(inst));
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break;
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case XOP_MSGCLR:
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emulated = kvmppc_e500_emul_msgclr(vcpu, get_rb(inst));
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break;
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#endif
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case XOP_TLBRE:
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emulated = kvmppc_e500_emul_tlbre(vcpu);
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break;
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case XOP_TLBWE:
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emulated = kvmppc_e500_emul_tlbwe(vcpu);
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break;
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case XOP_TLBSX:
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rb = get_rb(inst);
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emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
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break;
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case XOP_TLBILX:
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ra = get_ra(inst);
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rb = get_rb(inst);
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rt = get_rt(inst);
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emulated = kvmppc_e500_emul_tlbilx(vcpu, rt, ra, rb);
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break;
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case XOP_TLBIVAX:
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ra = get_ra(inst);
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rb = get_rb(inst);
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emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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if (emulated == EMULATE_FAIL)
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emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
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return emulated;
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}
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int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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int emulated = EMULATE_DONE;
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ulong spr_val = kvmppc_get_gpr(vcpu, rs);
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switch (sprn) {
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#ifndef CONFIG_KVM_BOOKE_HV
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case SPRN_PID:
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kvmppc_set_pid(vcpu, spr_val);
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break;
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case SPRN_PID1:
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if (spr_val != 0)
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return EMULATE_FAIL;
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vcpu_e500->pid[1] = spr_val; break;
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case SPRN_PID2:
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if (spr_val != 0)
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return EMULATE_FAIL;
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vcpu_e500->pid[2] = spr_val; break;
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case SPRN_MAS0:
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vcpu->arch.shared->mas0 = spr_val; break;
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case SPRN_MAS1:
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vcpu->arch.shared->mas1 = spr_val; break;
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case SPRN_MAS2:
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vcpu->arch.shared->mas2 = spr_val; break;
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case SPRN_MAS3:
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vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
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vcpu->arch.shared->mas7_3 |= spr_val;
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break;
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case SPRN_MAS4:
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vcpu->arch.shared->mas4 = spr_val; break;
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case SPRN_MAS6:
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vcpu->arch.shared->mas6 = spr_val; break;
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case SPRN_MAS7:
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vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
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vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
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break;
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#endif
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case SPRN_L1CSR0:
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vcpu_e500->l1csr0 = spr_val;
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vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
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break;
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case SPRN_L1CSR1:
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vcpu_e500->l1csr1 = spr_val; break;
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case SPRN_HID0:
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vcpu_e500->hid0 = spr_val; break;
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case SPRN_HID1:
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vcpu_e500->hid1 = spr_val; break;
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case SPRN_MMUCSR0:
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emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
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spr_val);
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break;
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/* extra exceptions */
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case SPRN_IVOR32:
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vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
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break;
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case SPRN_IVOR33:
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vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
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break;
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case SPRN_IVOR34:
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vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
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break;
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case SPRN_IVOR35:
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vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
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break;
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#ifdef CONFIG_KVM_BOOKE_HV
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case SPRN_IVOR36:
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vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
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break;
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case SPRN_IVOR37:
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vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
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break;
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#endif
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default:
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emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
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}
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return emulated;
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}
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int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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int emulated = EMULATE_DONE;
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switch (sprn) {
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#ifndef CONFIG_KVM_BOOKE_HV
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unsigned long val;
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case SPRN_PID:
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kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[0]); break;
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case SPRN_PID1:
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kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[1]); break;
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case SPRN_PID2:
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kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[2]); break;
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case SPRN_MAS0:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas0); break;
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case SPRN_MAS1:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas1); break;
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case SPRN_MAS2:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas2); break;
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case SPRN_MAS3:
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val = (u32)vcpu->arch.shared->mas7_3;
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kvmppc_set_gpr(vcpu, rt, val);
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break;
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case SPRN_MAS4:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas4); break;
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case SPRN_MAS6:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas6); break;
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case SPRN_MAS7:
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val = vcpu->arch.shared->mas7_3 >> 32;
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kvmppc_set_gpr(vcpu, rt, val);
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break;
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#endif
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case SPRN_TLB0CFG:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.tlbcfg[0]); break;
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case SPRN_TLB1CFG:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.tlbcfg[1]); break;
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case SPRN_L1CSR0:
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kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr0); break;
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case SPRN_L1CSR1:
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kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr1); break;
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case SPRN_HID0:
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kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid0); break;
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case SPRN_HID1:
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kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid1); break;
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case SPRN_SVR:
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kvmppc_set_gpr(vcpu, rt, vcpu_e500->svr); break;
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case SPRN_MMUCSR0:
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kvmppc_set_gpr(vcpu, rt, 0); break;
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case SPRN_MMUCFG:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.mmucfg); break;
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/* extra exceptions */
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case SPRN_IVOR32:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);
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break;
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case SPRN_IVOR33:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);
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break;
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case SPRN_IVOR34:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);
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break;
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case SPRN_IVOR35:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);
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break;
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#ifdef CONFIG_KVM_BOOKE_HV
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case SPRN_IVOR36:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL]);
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break;
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case SPRN_IVOR37:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT]);
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break;
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#endif
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default:
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emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
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}
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return emulated;
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}
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