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6aa20a2235
Signed-off-by: Jeff Garzik <jeff@garzik.org>
294 lines
6.4 KiB
C
294 lines
6.4 KiB
C
/*****************************************************************
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*
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* defines for 3Com Etherlink Plus adapter
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*
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*****************************************************************/
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#define ELP_DMA 6
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#define ELP_RX_PCBS 4
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#define ELP_MAX_CARDS 4
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/*
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* I/O register offsets
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*/
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#define PORT_COMMAND 0x00 /* read/write, 8-bit */
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#define PORT_STATUS 0x02 /* read only, 8-bit */
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#define PORT_AUXDMA 0x02 /* write only, 8-bit */
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#define PORT_DATA 0x04 /* read/write, 16-bit */
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#define PORT_CONTROL 0x06 /* read/write, 8-bit */
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#define ELP_IO_EXTENT 0x10 /* size of used IO registers */
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/*
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* host control registers bits
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*/
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#define ATTN 0x80 /* attention */
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#define FLSH 0x40 /* flush data register */
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#define DMAE 0x20 /* DMA enable */
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#define DIR 0x10 /* direction */
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#define TCEN 0x08 /* terminal count interrupt enable */
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#define CMDE 0x04 /* command register interrupt enable */
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#define HSF2 0x02 /* host status flag 2 */
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#define HSF1 0x01 /* host status flag 1 */
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/*
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* combinations of HSF flags used for PCB transmission
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*/
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#define HSF_PCB_ACK HSF1
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#define HSF_PCB_NAK HSF2
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#define HSF_PCB_END (HSF2|HSF1)
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#define HSF_PCB_MASK (HSF2|HSF1)
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/*
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* host status register bits
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*/
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#define HRDY 0x80 /* data register ready */
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#define HCRE 0x40 /* command register empty */
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#define ACRF 0x20 /* adapter command register full */
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/* #define DIR 0x10 direction - same as in control register */
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#define DONE 0x08 /* DMA done */
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#define ASF3 0x04 /* adapter status flag 3 */
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#define ASF2 0x02 /* adapter status flag 2 */
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#define ASF1 0x01 /* adapter status flag 1 */
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/*
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* combinations of ASF flags used for PCB reception
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*/
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#define ASF_PCB_ACK ASF1
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#define ASF_PCB_NAK ASF2
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#define ASF_PCB_END (ASF2|ASF1)
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#define ASF_PCB_MASK (ASF2|ASF1)
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/*
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* host aux DMA register bits
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*/
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#define DMA_BRST 0x01 /* DMA burst */
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/*
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* maximum amount of data allowed in a PCB
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*/
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#define MAX_PCB_DATA 62
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/*****************************************************************
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*
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* timeout value
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* this is a rough value used for loops to stop them from
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* locking up the whole machine in the case of failure or
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* error conditions
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*
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*****************************************************************/
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#define TIMEOUT 300
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/*****************************************************************
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*
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* PCB commands
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*
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*****************************************************************/
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enum {
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/*
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* host PCB commands
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*/
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CMD_CONFIGURE_ADAPTER_MEMORY = 0x01,
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CMD_CONFIGURE_82586 = 0x02,
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CMD_STATION_ADDRESS = 0x03,
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CMD_DMA_DOWNLOAD = 0x04,
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CMD_DMA_UPLOAD = 0x05,
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CMD_PIO_DOWNLOAD = 0x06,
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CMD_PIO_UPLOAD = 0x07,
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CMD_RECEIVE_PACKET = 0x08,
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CMD_TRANSMIT_PACKET = 0x09,
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CMD_NETWORK_STATISTICS = 0x0a,
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CMD_LOAD_MULTICAST_LIST = 0x0b,
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CMD_CLEAR_PROGRAM = 0x0c,
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CMD_DOWNLOAD_PROGRAM = 0x0d,
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CMD_EXECUTE_PROGRAM = 0x0e,
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CMD_SELF_TEST = 0x0f,
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CMD_SET_STATION_ADDRESS = 0x10,
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CMD_ADAPTER_INFO = 0x11,
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NUM_TRANSMIT_CMDS,
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/*
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* adapter PCB commands
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*/
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CMD_CONFIGURE_ADAPTER_RESPONSE = 0x31,
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CMD_CONFIGURE_82586_RESPONSE = 0x32,
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CMD_ADDRESS_RESPONSE = 0x33,
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CMD_DOWNLOAD_DATA_REQUEST = 0x34,
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CMD_UPLOAD_DATA_REQUEST = 0x35,
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CMD_RECEIVE_PACKET_COMPLETE = 0x38,
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CMD_TRANSMIT_PACKET_COMPLETE = 0x39,
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CMD_NETWORK_STATISTICS_RESPONSE = 0x3a,
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CMD_LOAD_MULTICAST_RESPONSE = 0x3b,
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CMD_CLEAR_PROGRAM_RESPONSE = 0x3c,
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CMD_DOWNLOAD_PROGRAM_RESPONSE = 0x3d,
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CMD_EXECUTE_RESPONSE = 0x3e,
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CMD_SELF_TEST_RESPONSE = 0x3f,
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CMD_SET_ADDRESS_RESPONSE = 0x40,
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CMD_ADAPTER_INFO_RESPONSE = 0x41
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};
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/* Definitions for the PCB data structure */
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/* Data units */
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typedef unsigned char byte;
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typedef unsigned short int word;
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typedef unsigned long int dword;
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/* Data structures */
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struct Memconf {
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word cmd_q,
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rcv_q,
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mcast,
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frame,
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rcv_b,
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progs;
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};
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struct Rcv_pkt {
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word buf_ofs,
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buf_seg,
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buf_len,
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timeout;
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};
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struct Xmit_pkt {
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word buf_ofs,
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buf_seg,
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pkt_len;
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};
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struct Rcv_resp {
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word buf_ofs,
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buf_seg,
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buf_len,
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pkt_len,
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timeout,
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status;
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dword timetag;
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};
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struct Xmit_resp {
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word buf_ofs,
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buf_seg,
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c_stat,
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status;
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};
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struct Netstat {
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dword tot_recv,
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tot_xmit;
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word err_CRC,
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err_align,
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err_res,
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err_ovrrun;
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};
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struct Selftest {
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word error;
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union {
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word ROM_cksum;
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struct {
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word ofs, seg;
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} RAM;
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word i82586;
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} failure;
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};
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struct Info {
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byte minor_vers,
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major_vers;
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word ROM_cksum,
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RAM_sz,
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free_ofs,
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free_seg;
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};
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struct Memdump {
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word size,
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off,
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seg;
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};
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/*
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Primary Command Block. The most important data structure. All communication
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between the host and the adapter is done with these. (Except for the actual
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Ethernet data, which has different packaging.)
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*/
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typedef struct {
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byte command;
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byte length;
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union {
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struct Memconf memconf;
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word configure;
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struct Rcv_pkt rcv_pkt;
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struct Xmit_pkt xmit_pkt;
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byte multicast[10][6];
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byte eth_addr[6];
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byte failed;
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struct Rcv_resp rcv_resp;
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struct Xmit_resp xmit_resp;
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struct Netstat netstat;
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struct Selftest selftest;
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struct Info info;
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struct Memdump memdump;
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byte raw[62];
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} data;
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} pcb_struct;
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/* These defines for 'configure' */
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#define RECV_STATION 0x00
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#define RECV_BROAD 0x01
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#define RECV_MULTI 0x02
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#define RECV_PROMISC 0x04
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#define NO_LOOPBACK 0x00
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#define INT_LOOPBACK 0x08
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#define EXT_LOOPBACK 0x10
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/*****************************************************************
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*
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* structure to hold context information for adapter
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*
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*****************************************************************/
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#define DMA_BUFFER_SIZE 1600
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#define BACKLOG_SIZE 4
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typedef struct {
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volatile short got[NUM_TRANSMIT_CMDS]; /* flags for
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command completion */
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pcb_struct tx_pcb; /* PCB for foreground sending */
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pcb_struct rx_pcb; /* PCB for foreground receiving */
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pcb_struct itx_pcb; /* PCB for background sending */
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pcb_struct irx_pcb; /* PCB for background receiving */
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struct net_device_stats stats;
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void *dma_buffer;
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struct {
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unsigned int length[BACKLOG_SIZE];
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unsigned int in;
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unsigned int out;
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} rx_backlog;
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struct {
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unsigned int direction;
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unsigned int length;
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struct sk_buff *skb;
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void *target;
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unsigned long start_time;
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} current_dma;
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/* flags */
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unsigned long send_pcb_semaphore;
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unsigned long dmaing;
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unsigned long busy;
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unsigned int rx_active; /* number of receive PCBs */
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volatile unsigned char hcr_val; /* what we think the HCR contains */
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spinlock_t lock; /* Interrupt v tx lock */
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} elp_device;
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