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1394f03221
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
93 lines
1.5 KiB
Plaintext
93 lines
1.5 KiB
Plaintext
if (BF533 || BF532 || BF531)
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menu "BF533/2/1 Specific Configuration"
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comment "Interrupt Priority Assignment"
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menu "Priority"
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config UART_ERROR
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int "UART ERROR"
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default 7
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config SPORT0_ERROR
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int "SPORT0 ERROR"
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default 7
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config SPI_ERROR
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int "SPI ERROR"
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default 7
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config SPORT1_ERROR
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int "SPORT1 ERROR"
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default 7
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config PPI_ERROR
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int "PPI ERROR"
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default 7
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config DMA_ERROR
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int "DMA ERROR"
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default 7
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config PLLWAKE_ERROR
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int "PLL WAKEUP ERROR"
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default 7
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config RTC_ERROR
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int "RTC ERROR"
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default 8
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config DMA0_PPI
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int "DMA0 PPI"
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default 8
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config DMA1_SPORT0RX
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int "DMA1 (SPORT0 RX)"
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default 9
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config DMA2_SPORT0TX
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int "DMA2 (SPORT0 TX)"
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default 9
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config DMA3_SPORT1RX
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int "DMA3 (SPORT1 RX)"
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default 9
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config DMA4_SPORT1TX
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int "DMA4 (SPORT1 TX)"
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default 9
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config DMA5_SPI
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int "DMA5 (SPI)"
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default 10
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config DMA6_UARTRX
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int "DMA6 (UART0 RX)"
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default 10
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config DMA7_UARTTX
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int "DMA7 (UART0 TX)"
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default 10
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config TIMER0
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int "TIMER0"
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default 11
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config TIMER1
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int "TIMER1"
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default 11
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config TIMER2
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int "TIMER2"
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default 11
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config PFA
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int "PF Interrupt A"
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default 12
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config PFB
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int "PF Interrupt B"
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default 12
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config MEMDMA0
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int "MEMORY DMA0"
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default 13
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config MEMDMA1
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int "MEMORY DMA1"
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default 13
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config WDTIMER
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int "WATCH DOG TIMER"
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default 13
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help
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Enter the priority numbers between 7-13 ONLY. Others are Reserved.
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This applies to all the above. It is not recommended to assign the
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highest priority number 7 to UART or any other device.
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endmenu
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endmenu
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endif
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