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f058599e22
The s390_mmio_read/write syscalls are currently broken when running with
MIO.
The new pcistb_mio/pcstg_mio/pcilg_mio instructions are executed
similiarly to normal load/store instructions and do address translation
in the current address space. That means inside the kernel they are
aware of mappings into kernel address space while outside the kernel
they use user space mappings (usually created through mmap'ing a PCI
device file).
Now when existing user space applications use the s390_pci_mmio_write
and s390_pci_mmio_read syscalls, they pass I/O addresses that are mapped
into user space so as to be usable with the new instructions without
needing a syscall. Accessing these addresses with the old instructions
as done currently leads to a kernel panic.
Also, for such a user space mapping there may not exist an equivalent
kernel space mapping which means we can't just use the new instructions
in kernel space.
Instead of replicating user mappings in the kernel which then might
collide with other mappings, we can conceptually execute the new
instructions as if executed by the user space application using the
secondary address space. This even allows us to directly store to the
user pointer without the need for copy_to/from_user().
Cc: stable@vger.kernel.org
Fixes: 71ba41c9b1
("s390/pci: provide support for MIO instructions")
Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
Reviewed-by: Sven Schnelle <svens@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
202 lines
4.1 KiB
C
202 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_S390_PCI_IO_H
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#define _ASM_S390_PCI_IO_H
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#ifdef CONFIG_PCI
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <asm/pci_insn.h>
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/* I/O size constraints */
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#define ZPCI_MAX_READ_SIZE 8
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#define ZPCI_MAX_WRITE_SIZE 128
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/* I/O Map */
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#define ZPCI_IOMAP_SHIFT 48
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#define ZPCI_IOMAP_ADDR_BASE 0x8000000000000000UL
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#define ZPCI_IOMAP_ADDR_OFF_MASK ((1UL << ZPCI_IOMAP_SHIFT) - 1)
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#define ZPCI_IOMAP_MAX_ENTRIES \
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((ULONG_MAX - ZPCI_IOMAP_ADDR_BASE + 1) / (1UL << ZPCI_IOMAP_SHIFT))
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#define ZPCI_IOMAP_ADDR_IDX_MASK \
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(~ZPCI_IOMAP_ADDR_OFF_MASK - ZPCI_IOMAP_ADDR_BASE)
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struct zpci_iomap_entry {
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u32 fh;
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u8 bar;
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u16 count;
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};
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extern struct zpci_iomap_entry *zpci_iomap_start;
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#define ZPCI_ADDR(idx) (ZPCI_IOMAP_ADDR_BASE | ((u64) idx << ZPCI_IOMAP_SHIFT))
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#define ZPCI_IDX(addr) \
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(((__force u64) addr & ZPCI_IOMAP_ADDR_IDX_MASK) >> ZPCI_IOMAP_SHIFT)
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#define ZPCI_OFFSET(addr) \
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((__force u64) addr & ZPCI_IOMAP_ADDR_OFF_MASK)
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#define ZPCI_CREATE_REQ(handle, space, len) \
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((u64) handle << 32 | space << 16 | len)
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#define zpci_read(LENGTH, RETTYPE) \
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static inline RETTYPE zpci_read_##RETTYPE(const volatile void __iomem *addr) \
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{ \
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u64 data; \
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int rc; \
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\
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rc = zpci_load(&data, addr, LENGTH); \
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if (rc) \
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data = -1ULL; \
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return (RETTYPE) data; \
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}
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#define zpci_write(LENGTH, VALTYPE) \
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static inline void zpci_write_##VALTYPE(VALTYPE val, \
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const volatile void __iomem *addr) \
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{ \
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u64 data = (VALTYPE) val; \
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\
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zpci_store(addr, data, LENGTH); \
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}
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zpci_read(8, u64)
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zpci_read(4, u32)
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zpci_read(2, u16)
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zpci_read(1, u8)
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zpci_write(8, u64)
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zpci_write(4, u32)
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zpci_write(2, u16)
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zpci_write(1, u8)
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static inline int zpci_write_single(volatile void __iomem *dst, const void *src,
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unsigned long len)
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{
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u64 val;
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switch (len) {
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case 1:
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val = (u64) *((u8 *) src);
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break;
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case 2:
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val = (u64) *((u16 *) src);
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break;
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case 4:
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val = (u64) *((u32 *) src);
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break;
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case 8:
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val = (u64) *((u64 *) src);
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break;
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default:
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val = 0; /* let FW report error */
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break;
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}
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return zpci_store(dst, val, len);
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}
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static inline int zpci_read_single(void *dst, const volatile void __iomem *src,
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unsigned long len)
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{
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u64 data;
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int cc;
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cc = zpci_load(&data, src, len);
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if (cc)
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goto out;
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switch (len) {
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case 1:
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*((u8 *) dst) = (u8) data;
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break;
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case 2:
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*((u16 *) dst) = (u16) data;
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break;
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case 4:
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*((u32 *) dst) = (u32) data;
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break;
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case 8:
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*((u64 *) dst) = (u64) data;
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break;
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}
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out:
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return cc;
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}
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int zpci_write_block(volatile void __iomem *dst, const void *src,
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unsigned long len);
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static inline u8 zpci_get_max_write_size(u64 src, u64 dst, int len, int max)
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{
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int count = len > max ? max : len, size = 1;
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while (!(src & 0x1) && !(dst & 0x1) && ((size << 1) <= count)) {
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dst = dst >> 1;
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src = src >> 1;
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size = size << 1;
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}
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return size;
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}
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static inline int zpci_memcpy_fromio(void *dst,
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const volatile void __iomem *src,
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unsigned long n)
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{
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int size, rc = 0;
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while (n > 0) {
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size = zpci_get_max_write_size((u64 __force) src,
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(u64) dst, n,
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ZPCI_MAX_READ_SIZE);
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rc = zpci_read_single(dst, src, size);
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if (rc)
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break;
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src += size;
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dst += size;
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n -= size;
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}
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return rc;
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}
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static inline int zpci_memcpy_toio(volatile void __iomem *dst,
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const void *src, unsigned long n)
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{
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int size, rc = 0;
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if (!src)
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return -EINVAL;
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while (n > 0) {
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size = zpci_get_max_write_size((u64 __force) dst,
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(u64) src, n,
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ZPCI_MAX_WRITE_SIZE);
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if (size > 8) /* main path */
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rc = zpci_write_block(dst, src, size);
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else
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rc = zpci_write_single(dst, src, size);
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if (rc)
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break;
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src += size;
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dst += size;
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n -= size;
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}
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return rc;
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}
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static inline int zpci_memset_io(volatile void __iomem *dst,
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unsigned char val, size_t count)
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{
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u8 *src = kmalloc(count, GFP_KERNEL);
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int rc;
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if (src == NULL)
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return -ENOMEM;
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memset(src, val, count);
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rc = zpci_memcpy_toio(dst, src, count);
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kfree(src);
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return rc;
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}
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#endif /* CONFIG_PCI */
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#endif /* _ASM_S390_PCI_IO_H */
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