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6c94f27ac8
Instead of using absolute addresses for both the exception location and the fixup, use offsets relative to the exception table entry values. Not only does this cut the size of the exception table in half, it is also a prerequisite for KASLR, since absolute exception table entries are subject to dynamic relocation, which is incompatible with the sorting of the exception table that occurs at build time. This patch also introduces the _ASM_EXTABLE preprocessor macro (which exists on x86 as well) and its _asm_extable assembly counterpart, as shorthands to emit exception table entries. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
148 lines
3.8 KiB
C
148 lines
3.8 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_FUTEX_H
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#define __ASM_FUTEX_H
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#ifdef __KERNEL__
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#include <linux/futex.h>
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#include <linux/uaccess.h>
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#include <asm/alternative.h>
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#include <asm/cpufeature.h>
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#include <asm/errno.h>
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#include <asm/sysreg.h>
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#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
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asm volatile( \
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ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, \
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CONFIG_ARM64_PAN) \
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" prfm pstl1strm, %2\n" \
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"1: ldxr %w1, %2\n" \
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insn "\n" \
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"2: stlxr %w3, %w0, %2\n" \
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" cbnz %w3, 1b\n" \
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" dmb ish\n" \
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"3:\n" \
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" .pushsection .fixup,\"ax\"\n" \
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" .align 2\n" \
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"4: mov %w0, %w5\n" \
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" b 3b\n" \
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" .popsection\n" \
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_ASM_EXTABLE(1b, 4b) \
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_ASM_EXTABLE(2b, 4b) \
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ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, \
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CONFIG_ARM64_PAN) \
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: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
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: "r" (oparg), "Ir" (-EFAULT) \
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: "memory")
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static inline int
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futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
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{
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int op = (encoded_op >> 28) & 7;
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int cmp = (encoded_op >> 24) & 15;
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int oparg = (encoded_op << 8) >> 20;
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int cmparg = (encoded_op << 20) >> 20;
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int oldval = 0, ret, tmp;
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if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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oparg = 1 << oparg;
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
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return -EFAULT;
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op("mov %w0, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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case FUTEX_OP_ADD:
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__futex_atomic_op("add %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_atomic_op("orr %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_atomic_op("and %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, ~oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_atomic_op("eor %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret) {
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switch (cmp) {
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case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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default: ret = -ENOSYS;
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}
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}
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return ret;
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}
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static inline int
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futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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u32 oldval, u32 newval)
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{
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int ret = 0;
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u32 val, tmp;
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
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return -EFAULT;
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asm volatile("// futex_atomic_cmpxchg_inatomic\n"
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ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
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" prfm pstl1strm, %2\n"
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"1: ldxr %w1, %2\n"
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" sub %w3, %w1, %w4\n"
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" cbnz %w3, 3f\n"
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"2: stlxr %w3, %w5, %2\n"
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" cbnz %w3, 1b\n"
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" dmb ish\n"
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"3:\n"
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" .pushsection .fixup,\"ax\"\n"
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"4: mov %w0, %w6\n"
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" b 3b\n"
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" .popsection\n"
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_ASM_EXTABLE(1b, 4b)
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_ASM_EXTABLE(2b, 4b)
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ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
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: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
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: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
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: "memory");
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*uval = val;
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return ret;
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}
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#endif /* __KERNEL__ */
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#endif /* __ASM_FUTEX_H */
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