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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
603 lines
14 KiB
C
603 lines
14 KiB
C
/*
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* pSeries_pci.c
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*
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* Copyright (C) 2001 Dave Engebretsen, IBM Corporation
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* Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
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*
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* pSeries specific routines for PCI.
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*
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* Based on code from pci.c and chrp_pci.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/threads.h>
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#include <linux/pci.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/irq.h>
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#include <asm/prom.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/iommu.h>
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#include <asm/rtas.h>
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#include "mpic.h"
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#include "pci.h"
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/* RTAS tokens */
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static int read_pci_config;
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static int write_pci_config;
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static int ibm_read_pci_config;
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static int ibm_write_pci_config;
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static int s7a_workaround;
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extern struct mpic *pSeries_mpic;
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static int config_access_valid(struct device_node *dn, int where)
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{
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if (where < 256)
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return 1;
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if (where < 4096 && dn->pci_ext_config_space)
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return 1;
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return 0;
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}
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static int rtas_read_config(struct device_node *dn, int where, int size, u32 *val)
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{
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int returnval = -1;
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unsigned long buid, addr;
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int ret;
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if (!dn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (!config_access_valid(dn, where))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
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(dn->devfn << 8) | (where & 0xff);
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buid = dn->phb->buid;
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if (buid) {
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ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
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addr, buid >> 32, buid & 0xffffffff, size);
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} else {
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ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
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}
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*val = returnval;
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if (ret)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (returnval == EEH_IO_ERROR_VALUE(size)
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&& eeh_dn_check_failure (dn, NULL))
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return PCIBIOS_DEVICE_NOT_FOUND;
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return PCIBIOS_SUCCESSFUL;
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}
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static int rtas_pci_read_config(struct pci_bus *bus,
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unsigned int devfn,
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int where, int size, u32 *val)
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{
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struct device_node *busdn, *dn;
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if (bus->self)
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busdn = pci_device_to_OF_node(bus->self);
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else
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busdn = bus->sysdata; /* must be a phb */
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/* Search only direct children of the bus */
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for (dn = busdn->child; dn; dn = dn->sibling)
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if (dn->devfn == devfn)
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return rtas_read_config(dn, where, size, val);
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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static int rtas_write_config(struct device_node *dn, int where, int size, u32 val)
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{
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unsigned long buid, addr;
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int ret;
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if (!dn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (!config_access_valid(dn, where))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
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(dn->devfn << 8) | (where & 0xff);
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buid = dn->phb->buid;
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if (buid) {
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ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >> 32, buid & 0xffffffff, size, (ulong) val);
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} else {
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ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
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}
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if (ret)
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return PCIBIOS_DEVICE_NOT_FOUND;
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return PCIBIOS_SUCCESSFUL;
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}
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static int rtas_pci_write_config(struct pci_bus *bus,
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unsigned int devfn,
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int where, int size, u32 val)
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{
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struct device_node *busdn, *dn;
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if (bus->self)
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busdn = pci_device_to_OF_node(bus->self);
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else
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busdn = bus->sysdata; /* must be a phb */
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/* Search only direct children of the bus */
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for (dn = busdn->child; dn; dn = dn->sibling)
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if (dn->devfn == devfn)
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return rtas_write_config(dn, where, size, val);
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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struct pci_ops rtas_pci_ops = {
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rtas_pci_read_config,
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rtas_pci_write_config
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};
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int is_python(struct device_node *dev)
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{
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char *model = (char *)get_property(dev, "model", NULL);
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if (model && strstr(model, "Python"))
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return 1;
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return 0;
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}
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static int get_phb_reg_prop(struct device_node *dev,
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unsigned int addr_size_words,
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struct reg_property64 *reg)
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{
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unsigned int *ui_ptr = NULL, len;
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/* Found a PHB, now figure out where his registers are mapped. */
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ui_ptr = (unsigned int *)get_property(dev, "reg", &len);
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if (ui_ptr == NULL)
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return 1;
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if (addr_size_words == 1) {
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reg->address = ((struct reg_property32 *)ui_ptr)->address;
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reg->size = ((struct reg_property32 *)ui_ptr)->size;
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} else {
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*reg = *((struct reg_property64 *)ui_ptr);
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}
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return 0;
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}
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static void python_countermeasures(struct device_node *dev,
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unsigned int addr_size_words)
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{
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struct reg_property64 reg_struct;
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void __iomem *chip_regs;
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volatile u32 val;
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if (get_phb_reg_prop(dev, addr_size_words, ®_struct))
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return;
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/* Python's register file is 1 MB in size. */
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chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000);
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/*
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* Firmware doesn't always clear this bit which is critical
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* for good performance - Anton
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*/
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#define PRG_CL_RESET_VALID 0x00010000
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val = in_be32(chip_regs + 0xf6030);
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if (val & PRG_CL_RESET_VALID) {
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printk(KERN_INFO "Python workaround: ");
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val &= ~PRG_CL_RESET_VALID;
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out_be32(chip_regs + 0xf6030, val);
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/*
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* We must read it back for changes to
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* take effect
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*/
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val = in_be32(chip_regs + 0xf6030);
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printk("reg0: %x\n", val);
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}
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iounmap(chip_regs);
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}
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void __init init_pci_config_tokens (void)
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{
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read_pci_config = rtas_token("read-pci-config");
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write_pci_config = rtas_token("write-pci-config");
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ibm_read_pci_config = rtas_token("ibm,read-pci-config");
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ibm_write_pci_config = rtas_token("ibm,write-pci-config");
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}
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unsigned long __devinit get_phb_buid (struct device_node *phb)
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{
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int addr_cells;
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unsigned int *buid_vals;
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unsigned int len;
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unsigned long buid;
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if (ibm_read_pci_config == -1) return 0;
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/* PHB's will always be children of the root node,
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* or so it is promised by the current firmware. */
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if (phb->parent == NULL)
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return 0;
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if (phb->parent->parent)
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return 0;
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buid_vals = (unsigned int *) get_property(phb, "reg", &len);
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if (buid_vals == NULL)
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return 0;
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addr_cells = prom_n_addr_cells(phb);
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if (addr_cells == 1) {
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buid = (unsigned long) buid_vals[0];
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} else {
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buid = (((unsigned long)buid_vals[0]) << 32UL) |
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(((unsigned long)buid_vals[1]) & 0xffffffff);
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}
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return buid;
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}
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static int phb_set_bus_ranges(struct device_node *dev,
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struct pci_controller *phb)
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{
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int *bus_range;
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unsigned int len;
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bus_range = (int *) get_property(dev, "bus-range", &len);
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if (bus_range == NULL || len < 2 * sizeof(int)) {
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return 1;
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}
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phb->first_busno = bus_range[0];
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phb->last_busno = bus_range[1];
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return 0;
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}
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static int __devinit setup_phb(struct device_node *dev,
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struct pci_controller *phb,
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unsigned int addr_size_words)
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{
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pci_setup_pci_controller(phb);
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if (is_python(dev))
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python_countermeasures(dev, addr_size_words);
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if (phb_set_bus_ranges(dev, phb))
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return 1;
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phb->arch_data = dev;
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phb->ops = &rtas_pci_ops;
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phb->buid = get_phb_buid(dev);
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return 0;
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}
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static void __devinit add_linux_pci_domain(struct device_node *dev,
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struct pci_controller *phb,
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struct property *of_prop)
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{
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memset(of_prop, 0, sizeof(struct property));
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of_prop->name = "linux,pci-domain";
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of_prop->length = sizeof(phb->global_number);
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of_prop->value = (unsigned char *)&of_prop[1];
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memcpy(of_prop->value, &phb->global_number, sizeof(phb->global_number));
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prom_add_property(dev, of_prop);
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}
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static struct pci_controller * __init alloc_phb(struct device_node *dev,
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unsigned int addr_size_words)
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{
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struct pci_controller *phb;
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struct property *of_prop;
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phb = alloc_bootmem(sizeof(struct pci_controller));
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if (phb == NULL)
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return NULL;
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of_prop = alloc_bootmem(sizeof(struct property) +
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sizeof(phb->global_number));
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if (!of_prop)
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return NULL;
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if (setup_phb(dev, phb, addr_size_words))
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return NULL;
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add_linux_pci_domain(dev, phb, of_prop);
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return phb;
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}
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static struct pci_controller * __devinit alloc_phb_dynamic(struct device_node *dev, unsigned int addr_size_words)
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{
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struct pci_controller *phb;
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phb = (struct pci_controller *)kmalloc(sizeof(struct pci_controller),
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GFP_KERNEL);
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if (phb == NULL)
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return NULL;
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if (setup_phb(dev, phb, addr_size_words))
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return NULL;
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phb->is_dynamic = 1;
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/* TODO: linux,pci-domain? */
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return phb;
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}
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unsigned long __init find_and_init_phbs(void)
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{
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struct device_node *node;
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struct pci_controller *phb;
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unsigned int root_size_cells = 0;
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unsigned int index;
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unsigned int *opprop = NULL;
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struct device_node *root = of_find_node_by_path("/");
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if (ppc64_interrupt_controller == IC_OPEN_PIC) {
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opprop = (unsigned int *)get_property(root,
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"platform-open-pic", NULL);
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}
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root_size_cells = prom_n_size_cells(root);
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index = 0;
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for (node = of_get_next_child(root, NULL);
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node != NULL;
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node = of_get_next_child(root, node)) {
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if (node->type == NULL || strcmp(node->type, "pci") != 0)
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continue;
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phb = alloc_phb(node, root_size_cells);
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if (!phb)
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continue;
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pci_process_bridge_OF_ranges(phb, node);
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pci_setup_phb_io(phb, index == 0);
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if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
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int addr = root_size_cells * (index + 2) - 1;
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mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
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}
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index++;
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}
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of_node_put(root);
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pci_devs_phb_init();
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/*
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* pci_probe_only and pci_assign_all_buses can be set via properties
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* in chosen.
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*/
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if (of_chosen) {
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int *prop;
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prop = (int *)get_property(of_chosen, "linux,pci-probe-only",
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NULL);
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if (prop)
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pci_probe_only = *prop;
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prop = (int *)get_property(of_chosen,
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"linux,pci-assign-all-buses", NULL);
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if (prop)
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pci_assign_all_buses = *prop;
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}
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return 0;
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}
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struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
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{
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struct device_node *root = of_find_node_by_path("/");
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unsigned int root_size_cells = 0;
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struct pci_controller *phb;
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struct pci_bus *bus;
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int primary;
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root_size_cells = prom_n_size_cells(root);
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primary = list_empty(&hose_list);
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phb = alloc_phb_dynamic(dn, root_size_cells);
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if (!phb)
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return NULL;
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pci_process_bridge_OF_ranges(phb, dn);
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pci_setup_phb_io_dynamic(phb, primary);
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of_node_put(root);
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pci_devs_phb_init_dynamic(phb);
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phb->last_busno = 0xff;
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bus = pci_scan_bus(phb->first_busno, phb->ops, phb->arch_data);
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phb->bus = bus;
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phb->last_busno = bus->subordinate;
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return phb;
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}
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EXPORT_SYMBOL(init_phb_dynamic);
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#if 0
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void pcibios_name_device(struct pci_dev *dev)
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{
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struct device_node *dn;
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/*
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* Add IBM loc code (slot) as a prefix to the device names for service
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*/
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dn = pci_device_to_OF_node(dev);
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if (dn) {
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char *loc_code = get_property(dn, "ibm,loc-code", 0);
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if (loc_code) {
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int loc_len = strlen(loc_code);
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if (loc_len < sizeof(dev->dev.name)) {
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memmove(dev->dev.name+loc_len+1, dev->dev.name,
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sizeof(dev->dev.name)-loc_len-1);
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memcpy(dev->dev.name, loc_code, loc_len);
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dev->dev.name[loc_len] = ' ';
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dev->dev.name[sizeof(dev->dev.name)-1] = '\0';
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}
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}
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
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#endif
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static void check_s7a(void)
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{
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struct device_node *root;
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char *model;
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root = of_find_node_by_path("/");
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if (root) {
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model = get_property(root, "model", NULL);
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if (model && !strcmp(model, "IBM,7013-S7A"))
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s7a_workaround = 1;
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of_node_put(root);
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}
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}
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/* RPA-specific bits for removing PHBs */
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int pcibios_remove_root_bus(struct pci_controller *phb)
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{
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struct pci_bus *b = phb->bus;
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struct resource *res;
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int rc, i;
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res = b->resource[0];
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if (!res->flags) {
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printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
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b->name);
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return 1;
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}
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rc = unmap_bus_range(b);
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if (rc) {
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printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
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__FUNCTION__, b->name);
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return 1;
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}
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if (release_resource(res)) {
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printk(KERN_ERR "%s: failed to release IO on bus %s\n",
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__FUNCTION__, b->name);
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return 1;
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}
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for (i = 1; i < 3; ++i) {
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res = b->resource[i];
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if (!res->flags && i == 0) {
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printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
|
|
__FUNCTION__, b->name);
|
|
return 1;
|
|
}
|
|
if (res->flags && release_resource(res)) {
|
|
printk(KERN_ERR
|
|
"%s: failed to release IO %d on bus %s\n",
|
|
__FUNCTION__, i, b->name);
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
list_del(&phb->list_node);
|
|
if (phb->is_dynamic)
|
|
kfree(phb);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(pcibios_remove_root_bus);
|
|
|
|
static void __init pSeries_request_regions(void)
|
|
{
|
|
if (!isa_io_base)
|
|
return;
|
|
|
|
request_region(0x20,0x20,"pic1");
|
|
request_region(0xa0,0x20,"pic2");
|
|
request_region(0x00,0x20,"dma1");
|
|
request_region(0x40,0x20,"timer");
|
|
request_region(0x80,0x10,"dma page reg");
|
|
request_region(0xc0,0x20,"dma2");
|
|
}
|
|
|
|
void __init pSeries_final_fixup(void)
|
|
{
|
|
struct pci_dev *dev = NULL;
|
|
|
|
check_s7a();
|
|
|
|
for_each_pci_dev(dev) {
|
|
pci_read_irq_line(dev);
|
|
if (s7a_workaround) {
|
|
if (dev->irq > 16) {
|
|
dev->irq -= 3;
|
|
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
|
|
}
|
|
}
|
|
}
|
|
|
|
phbs_remap_io();
|
|
pSeries_request_regions();
|
|
|
|
pci_addr_cache_build();
|
|
}
|
|
|
|
/*
|
|
* Assume the winbond 82c105 is the IDE controller on a
|
|
* p610. We should probably be more careful in case
|
|
* someone tries to plug in a similar adapter.
|
|
*/
|
|
static void fixup_winbond_82c105(struct pci_dev* dev)
|
|
{
|
|
int i;
|
|
unsigned int reg;
|
|
|
|
if (!(systemcfg->platform & PLATFORM_PSERIES))
|
|
return;
|
|
|
|
printk("Using INTC for W82c105 IDE controller.\n");
|
|
pci_read_config_dword(dev, 0x40, ®);
|
|
/* Enable LEGIRQ to use INTC instead of ISA interrupts */
|
|
pci_write_config_dword(dev, 0x40, reg | (1<<11));
|
|
|
|
for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) {
|
|
/* zap the 2nd function of the winbond chip */
|
|
if (dev->resource[i].flags & IORESOURCE_IO
|
|
&& dev->bus->number == 0 && dev->devfn == 0x81)
|
|
dev->resource[i].flags &= ~IORESOURCE_IO;
|
|
}
|
|
}
|
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
|
|
fixup_winbond_82c105);
|