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IV transfer from ofifo to class2 (set up at [29][30]) is not guaranteed
to be scheduled before the data transfer from ofifo to external memory
(set up at [38]:
[29] 10FA0004 ld: ind-nfifo (len=4) imm
[30] 81F00010 <nfifo_entry: ofifo->class2 type=msg len=16>
[31] 14820004 ld: ccb2-datasz len=4 offs=0 imm
[32] 00000010 data:0x00000010
[33] 8210010D operation: cls1-op aes cbc init-final enc
[34] A8080B04 math: (seqin + math0)->vseqout len=4
[35] 28000010 seqfifold: skip len=16
[36] A8080A04 math: (seqin + math0)->vseqin len=4
[37] 2F1E0000 seqfifold: both msg1->2-last2-last1 len=vseqinsz
[38] 69300000 seqfifostr: msg len=vseqoutsz
[39] 5C20000C seqstr: ccb2 ctx len=12 offs=0
If ofifo -> external memory transfer happens first, DECO will hang
(issuing a Watchdog Timeout error, if WDOG is enabled) waiting for
data availability in ofifo for the ofifo -> c2 ififo transfer.
Make sure IV transfer happens first by waiting for all CAAM internal
transfers to end before starting payload transfer.
New descriptor with jump command inserted at [37]:
[..]
[36] A8080A04 math: (seqin + math0)->vseqin len=4
[37] A1000401 jump: jsl1 all-match[!nfifopend] offset=[01] local->[38]
[38] 2F1E0000 seqfifold: both msg1->2-last2-last1 len=vseqinsz
[39] 69300000 seqfifostr: msg len=vseqoutsz
[40] 5C20000C seqstr: ccb2 ctx len=12 offs=0
[Note: the issue is present in the descriptor from the very beginning
(cf. Fixes tag). However I've marked it v4.19+ since it's the oldest
maintained kernel that the patch applies clean against.]
Cc: <stable@vger.kernel.org> # v4.19+
Fixes: 1acebad3d8 ("crypto: caam - faster aead implementation")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
117 lines
4.6 KiB
C
117 lines
4.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Shared descriptors for aead, skcipher algorithms
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*
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* Copyright 2016 NXP
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*/
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#ifndef _CAAMALG_DESC_H_
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#define _CAAMALG_DESC_H_
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/* length of descriptors text */
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#define DESC_AEAD_BASE (4 * CAAM_CMD_SZ)
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#define DESC_AEAD_ENC_LEN (DESC_AEAD_BASE + 11 * CAAM_CMD_SZ)
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#define DESC_AEAD_DEC_LEN (DESC_AEAD_BASE + 15 * CAAM_CMD_SZ)
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#define DESC_AEAD_GIVENC_LEN (DESC_AEAD_ENC_LEN + 8 * CAAM_CMD_SZ)
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#define DESC_QI_AEAD_ENC_LEN (DESC_AEAD_ENC_LEN + 3 * CAAM_CMD_SZ)
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#define DESC_QI_AEAD_DEC_LEN (DESC_AEAD_DEC_LEN + 3 * CAAM_CMD_SZ)
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#define DESC_QI_AEAD_GIVENC_LEN (DESC_AEAD_GIVENC_LEN + 3 * CAAM_CMD_SZ)
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/* Note: Nonce is counted in cdata.keylen */
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#define DESC_AEAD_CTR_RFC3686_LEN (4 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_BASE (3 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_ENC_LEN (DESC_AEAD_NULL_BASE + 11 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_DEC_LEN (DESC_AEAD_NULL_BASE + 13 * CAAM_CMD_SZ)
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#define DESC_GCM_BASE (3 * CAAM_CMD_SZ)
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#define DESC_GCM_ENC_LEN (DESC_GCM_BASE + 16 * CAAM_CMD_SZ)
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#define DESC_GCM_DEC_LEN (DESC_GCM_BASE + 12 * CAAM_CMD_SZ)
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#define DESC_QI_GCM_ENC_LEN (DESC_GCM_ENC_LEN + 6 * CAAM_CMD_SZ)
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#define DESC_QI_GCM_DEC_LEN (DESC_GCM_DEC_LEN + 3 * CAAM_CMD_SZ)
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#define DESC_RFC4106_BASE (3 * CAAM_CMD_SZ)
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#define DESC_RFC4106_ENC_LEN (DESC_RFC4106_BASE + 13 * CAAM_CMD_SZ)
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#define DESC_RFC4106_DEC_LEN (DESC_RFC4106_BASE + 13 * CAAM_CMD_SZ)
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#define DESC_QI_RFC4106_ENC_LEN (DESC_RFC4106_ENC_LEN + 5 * CAAM_CMD_SZ)
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#define DESC_QI_RFC4106_DEC_LEN (DESC_RFC4106_DEC_LEN + 5 * CAAM_CMD_SZ)
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#define DESC_RFC4543_BASE (3 * CAAM_CMD_SZ)
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#define DESC_RFC4543_ENC_LEN (DESC_RFC4543_BASE + 11 * CAAM_CMD_SZ)
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#define DESC_RFC4543_DEC_LEN (DESC_RFC4543_BASE + 12 * CAAM_CMD_SZ)
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#define DESC_QI_RFC4543_ENC_LEN (DESC_RFC4543_ENC_LEN + 4 * CAAM_CMD_SZ)
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#define DESC_QI_RFC4543_DEC_LEN (DESC_RFC4543_DEC_LEN + 4 * CAAM_CMD_SZ)
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#define DESC_SKCIPHER_BASE (3 * CAAM_CMD_SZ)
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#define DESC_SKCIPHER_ENC_LEN (DESC_SKCIPHER_BASE + \
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21 * CAAM_CMD_SZ)
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#define DESC_SKCIPHER_DEC_LEN (DESC_SKCIPHER_BASE + \
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16 * CAAM_CMD_SZ)
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void cnstr_shdsc_aead_null_encap(u32 * const desc, struct alginfo *adata,
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unsigned int icvsize, int era);
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void cnstr_shdsc_aead_null_decap(u32 * const desc, struct alginfo *adata,
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unsigned int icvsize, int era);
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void cnstr_shdsc_aead_encap(u32 * const desc, struct alginfo *cdata,
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struct alginfo *adata, unsigned int ivsize,
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unsigned int icvsize, const bool is_rfc3686,
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u32 *nonce, const u32 ctx1_iv_off,
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const bool is_qi, int era);
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void cnstr_shdsc_aead_decap(u32 * const desc, struct alginfo *cdata,
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struct alginfo *adata, unsigned int ivsize,
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unsigned int icvsize, const bool geniv,
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const bool is_rfc3686, u32 *nonce,
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const u32 ctx1_iv_off, const bool is_qi, int era);
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void cnstr_shdsc_aead_givencap(u32 * const desc, struct alginfo *cdata,
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struct alginfo *adata, unsigned int ivsize,
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unsigned int icvsize, const bool is_rfc3686,
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u32 *nonce, const u32 ctx1_iv_off,
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const bool is_qi, int era);
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void cnstr_shdsc_gcm_encap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_gcm_decap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_rfc4106_encap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_rfc4106_decap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_rfc4543_encap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_rfc4543_decap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_chachapoly(u32 * const desc, struct alginfo *cdata,
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struct alginfo *adata, unsigned int ivsize,
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unsigned int icvsize, const bool encap,
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const bool is_qi);
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void cnstr_shdsc_skcipher_encap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, const bool is_rfc3686,
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const u32 ctx1_iv_off);
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void cnstr_shdsc_skcipher_decap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, const bool is_rfc3686,
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const u32 ctx1_iv_off);
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void cnstr_shdsc_xts_skcipher_encap(u32 * const desc, struct alginfo *cdata);
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void cnstr_shdsc_xts_skcipher_decap(u32 * const desc, struct alginfo *cdata);
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#endif /* _CAAMALG_DESC_H_ */
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