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SRAM bindings for various SoCs, using the mmio-sram genalloc API, are spread over different places - per SoC vendor. Since all of these are quite similar (they depend on mmio-sram) move them to a common place. Suggested-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Kukjin Kim <kgene@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Rob Herring <robh@kernel.org>
17 lines
511 B
Plaintext
17 lines
511 B
Plaintext
Rockchip SRAM for pmu:
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------------------------------
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The sram of pmu is used to store the function of resume from maskrom(the 1st
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level loader). This is a common use of the "pmu-sram" because it keeps power
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even in low power states in the system.
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Required node properties:
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- compatible : should be "rockchip,rk3288-pmu-sram"
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- reg : physical base address and the size of the registers window
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Example:
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sram@ff720000 {
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compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
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reg = <0xff720000 0x1000>;
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};
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