mirror of
https://github.com/torvalds/linux.git
synced 2024-12-29 22:31:32 +00:00
17b860bbfc
During noirq suspend phase, mailbox MU irq will be masked but many drivers still need to communicate with system controller firmware via mailbox, if MU irq is masked, it will cause RPC timeout as below: [ 23.372103] imx-scu scu: RPC send msg timeout Setting MU irq to be wakeup source is NOT working as GIC driver does NOT have .irq_set_wake implemented, so to support suspend/resume, just make imx mailbox driver NOT suspend, since MU is always a wakeup source on i.MX platforms with system controller inside, and its power/clock is maintained by system controller, mailbox driver no need to manage them. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> |
||
|---|---|---|
| .. | ||
| arm_mhu.c | ||
| bcm2835-mailbox.c | ||
| bcm-flexrm-mailbox.c | ||
| bcm-pdc-mailbox.c | ||
| hi3660-mailbox.c | ||
| hi6220-mailbox.c | ||
| imx-mailbox.c | ||
| Kconfig | ||
| mailbox-altera.c | ||
| mailbox-sti.c | ||
| mailbox-test.c | ||
| mailbox-xgene-slimpro.c | ||
| mailbox.c | ||
| mailbox.h | ||
| Makefile | ||
| mtk-cmdq-mailbox.c | ||
| omap-mailbox.c | ||
| pcc.c | ||
| pl320-ipc.c | ||
| platform_mhu.c | ||
| qcom-apcs-ipc-mailbox.c | ||
| rockchip-mailbox.c | ||
| stm32-ipcc.c | ||
| tegra-hsp.c | ||
| ti-msgmgr.c | ||
| zynqmp-ipi-mailbox.c | ||