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6a721db180
The A31 has a mostly different clock set compared to the other older SoCs currently supported in the Allwinner clock driver. Add support for the basic useful clocks. The other ones will come in eventually. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Emilio López <emilio@elopez.com.ar>
84 lines
1.2 KiB
Plaintext
84 lines
1.2 KiB
Plaintext
Gate clock outputs
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* AHB1 gates ("allwinner,sun6i-a31-ahb1-gates-clk")
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MIPI DSI 1
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SS 5
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DMA 6
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MMC0 8
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MMC1 9
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MMC2 10
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MMC3 11
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NAND1 12
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NAND0 13
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SDRAM 14
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GMAC 17
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TS 18
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HSTIMER 19
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SPI0 20
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SPI1 21
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SPI2 22
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SPI3 23
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USB_OTG 24
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EHCI0 26
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EHCI1 27
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OHCI0 29
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OHCI1 30
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OHCI2 31
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VE 32
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LCD0 36
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LCD1 37
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CSI 40
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HDMI 43
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DE_BE0 44
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DE_BE1 45
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DE_FE1 46
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DE_FE1 47
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MP 50
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GPU 52
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DEU0 55
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DEU1 56
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DRC0 57
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DRC1 58
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* APB1 gates ("allwinner,sun6i-a31-apb1-gates-clk")
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CODEC 0
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DIGITAL MIC 4
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PIO 5
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DAUDIO0 12
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DAUDIO1 13
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* APB2 gates ("allwinner,sun6i-a31-apb2-gates-clk")
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I2C0 0
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I2C1 1
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I2C2 2
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I2C3 3
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UART0 16
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UART1 17
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UART2 18
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UART3 19
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UART4 20
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UART5 21
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Notation:
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[*]: The datasheet didn't mention these, but they are present on AW code
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[**]: The datasheet had this marked as "NC" but they are used on AW code
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