Philipp Zabel 4585945bf1 clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output ... The configurable hdmi_ref output of the PLL block is derived from the tvdpll_594m clock signal via a configurable PLL post-divider. It is used as the PLL reference input to the HDMI PHY module. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: James Liao <jamesjj.liao@mediatek.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org>		2016-05-06 17:47:40 +02:00
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clk-apmixed.c	clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS	2015-10-01 12:06:00 +08:00
clk-gate.c	clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h	2016-01-29 12:59:50 -08:00
clk-gate.h	clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h	2016-01-29 12:59:50 -08:00
clk-mt8135.c	clk: mediatek: Properly include clk.h	2015-07-20 10:53:09 -07:00
clk-mt8173.c	clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output	2016-05-06 17:47:40 +02:00
clk-mtk.c	clk: mediatek: Remove CLK_IS_ROOT	2016-03-02 17:44:06 -08:00
clk-mtk.h	clk: mediatek: make dpi0_sel propagate rate changes	2016-05-06 17:47:39 +02:00
clk-pll.c	clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS	2015-10-01 12:06:00 +08:00
Makefile	clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS	2015-10-01 12:06:00 +08:00
reset.c	clk: mediatek: Make reset_control_ops const	2016-03-29 16:29:19 -07:00