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d8bf96e079
Add routines for accessing the registers and counters in the performance monitoring unit. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
58 lines
1.7 KiB
C
58 lines
1.7 KiB
C
/*
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* Cell Broadband Engine Performance Monitor
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*
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* (C) Copyright IBM Corporation 2001,2006
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*
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* Author:
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* David Erb (djerb@us.ibm.com)
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* Kevin Corry (kevcorry@us.ibm.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __PERFMON_H__
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#define __PERFMON_H__
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enum pm_reg_name {
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group_control,
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debug_bus_control,
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trace_address,
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ext_tr_timer,
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pm_status,
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pm_control,
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pm_interval,
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pm_start_stop,
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};
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extern u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr);
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extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);
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extern u32 cbe_read_ctr(u32 cpu, u32 ctr);
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extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val);
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extern u32 cbe_read_pm07_control(u32 cpu, u32 ctr);
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extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val);
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extern u32 cbe_read_pm (u32 cpu, enum pm_reg_name reg);
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extern void cbe_write_pm (u32 cpu, enum pm_reg_name reg, u32 val);
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extern u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr);
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extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);
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extern void cbe_enable_pm(u32 cpu);
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extern void cbe_disable_pm(u32 cpu);
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extern void cbe_read_trace_buffer(u32 cpu, u64 *buf);
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#endif
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