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- Core and platform-MSI The core changes have been adopted from previous work which converted ARM[64] to the new per device MSI domain model, which was merged to support multiple MSI domain per device. The ARM[64] changes are being worked on too, but have not been ready yet. The core and platform-MSI changes have been split out to not hold up RISC-V and to avoid that RISC-V builds on the scheduled for removal interfaces. The core support provides new interfaces to handle wire to MSI bridges in a straight forward way and introduces new platform-MSI interfaces which are built on top of the per device MSI domain model. Once ARM[64] is converted over the old platform-MSI interfaces and the related ugliness in the MSI core code will be removed. - Drivers: - Add a new driver for the Andes hart-level interrupt controller - Rework the SiFive PLIC driver to prepare for MSI suport - Expand the RISC-V INTC driver to support the new RISC-V AIA controller which provides the basis for MSI on RISC-V - A few fixup for the fallout of the core changes. The actual MSI parts for RISC-V were finalized late and have been post-poned for the next merge window. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmXt7MsTHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYofrMD/9Dag12ttmbE2uqzTzlTxc7RHC2MX5n VJLt84FNNwGPA4r7WLOOqHrfuvfoGjuWT9pYMrVaXCglRG1CMvL10kHMB2f28UWv Qpc5PzbJwpD6tqyfRSFHMoJp63DAI8IpS7J3I8bqnRD8+0PwYn3jMA1+iMZkH0B7 8uO3mxlFhQ7BFvIAeMEAhR0szuAfvXqEtpi1iTgQTrQ4Je4Rf1pmLjEe2rkwDvF4 p3SAmPIh4+F3IjO7vNsVkQ2yOarTP2cpSns6JmO8mrobLIVX7ZCQ6uVaVCfBhxfx WttuJO6Bmh/I15yDe/waH6q9ym+0VBwYRWi5lonMpViGdq4/D2WVnY1mNeLRIfjl X65aMWE1+bhiqyIIUfc24hacf0UgBIlMEW4kJ31VmQzb+OyLDXw+UvzWg1dO6XdA 3L6j1nRgHk0ea5yFyH6SfH/mrfeyqHuwHqo17KFyHxD3jM2H1RRMplpbwXiOIepp KJJ/O06eMEzHqzn4B8GCT2EvX6L2ehgoWbLeEDNLQh/3LwA9OdcBzPr6gsweEl0U Q7szJgUWZHeMr39F2rnt0GmvkEuu6muEp/nQzfnohjoYZ0PhpMLSq++4Gi+Ko3fz 2IyecJ+tlbSfyM5//8AdNnOSpsTG3f8u6B/WwhGp5lIDwMnMzCssgfQmRnc3Uyv5 kU3pdMjURJaTUA== =7aXj -----END PGP SIGNATURE----- Merge tag 'irq-msi-2024-03-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull MSI updates from Thomas Gleixner: "Updates for the MSI interrupt subsystem and initial RISC-V MSI support. The core changes have been adopted from previous work which converted ARM[64] to the new per device MSI domain model, which was merged to support multiple MSI domain per device. The ARM[64] changes are being worked on too, but have not been ready yet. The core and platform-MSI changes have been split out to not hold up RISC-V and to avoid that RISC-V builds on the scheduled for removal interfaces. The core support provides new interfaces to handle wire to MSI bridges in a straight forward way and introduces new platform-MSI interfaces which are built on top of the per device MSI domain model. Once ARM[64] is converted over the old platform-MSI interfaces and the related ugliness in the MSI core code will be removed. The actual MSI parts for RISC-V were finalized late and have been post-poned for the next merge window. Drivers: - Add a new driver for the Andes hart-level interrupt controller - Rework the SiFive PLIC driver to prepare for MSI suport - Expand the RISC-V INTC driver to support the new RISC-V AIA controller which provides the basis for MSI on RISC-V - A few fixup for the fallout of the core changes" * tag 'irq-msi-2024-03-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (29 commits) irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA x86/apic/msi: Use DOMAIN_BUS_GENERIC_MSI for HPET/IO-APIC domain search genirq/matrix: Dynamic bitmap allocation irqchip/riscv-intc: Add support for RISC-V AIA irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe() irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain creation failure irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent fwnode irqchip/sifive-plic: Use devm_xyz() for managed allocation irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz() irqchip/sifive-plic: Convert PLIC driver into a platform driver irqchip/riscv-intc: Introduce Andes hart-level interrupt controller irqchip/riscv-intc: Allow large non-standard interrupt number genirq/irqdomain: Don't call ops->select for DOMAIN_BUS_ANY tokens irqchip/imx-intmux: Handle pure domain searches correctly genirq/msi: Provide MSI_FLAG_PARENT_PM_DEV genirq/irqdomain: Reroute device MSI create_mapping genirq/msi: Provide allocation/free functions for "wired" MSI interrupts genirq/msi: Optionally use dev->fwnode for device domain genirq/msi: Provide DOMAIN_BUS_WIRED_TO_MSI ... |
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.. | ||
acpi | ||
apic | ||
cpu | ||
fpu | ||
kprobes | ||
.gitignore | ||
alternative.c | ||
amd_gart_64.c | ||
amd_nb.c | ||
aperture_64.c | ||
apm_32.c | ||
asm-offsets_32.c | ||
asm-offsets_64.c | ||
asm-offsets.c | ||
audit_64.c | ||
bootflag.c | ||
callthunks.c | ||
cet.c | ||
cfi.c | ||
check.c | ||
cpuid.c | ||
crash_core_32.c | ||
crash_core_64.c | ||
crash_dump_32.c | ||
crash_dump_64.c | ||
crash.c | ||
devicetree.c | ||
doublefault_32.c | ||
dumpstack_32.c | ||
dumpstack_64.c | ||
dumpstack.c | ||
e820.c | ||
early_printk.c | ||
early-quirks.c | ||
ebda.c | ||
eisa.c | ||
espfix_64.c | ||
ftrace_32.S | ||
ftrace_64.S | ||
ftrace.c | ||
head32.c | ||
head64.c | ||
head_32.S | ||
head_64.S | ||
hpet.c | ||
hw_breakpoint.c | ||
i8237.c | ||
i8253.c | ||
i8259.c | ||
ibt_selftest.S | ||
idt.c | ||
io_delay.c | ||
ioport.c | ||
irq_32.c | ||
irq_64.c | ||
irq_work.c | ||
irq.c | ||
irqflags.S | ||
irqinit.c | ||
itmt.c | ||
jailhouse.c | ||
jump_label.c | ||
kdebugfs.c | ||
kexec-bzimage64.c | ||
kgdb.c | ||
ksysfs.c | ||
kvm.c | ||
kvmclock.c | ||
ldt.c | ||
machine_kexec_32.c | ||
machine_kexec_64.c | ||
Makefile | ||
mmconf-fam10h_64.c | ||
module.c | ||
mpparse.c | ||
msr.c | ||
nmi_selftest.c | ||
nmi.c | ||
paravirt-spinlocks.c | ||
paravirt.c | ||
pci-dma.c | ||
pcspeaker.c | ||
perf_regs.c | ||
platform-quirks.c | ||
pmem.c | ||
probe_roms.c | ||
process_32.c | ||
process_64.c | ||
process.c | ||
process.h | ||
ptrace.c | ||
pvclock.c | ||
quirks.c | ||
reboot_fixups_32.c | ||
reboot.c | ||
relocate_kernel_32.S | ||
relocate_kernel_64.S | ||
resource.c | ||
rethook.c | ||
rtc.c | ||
setup_percpu.c | ||
setup.c | ||
sev_verify_cbit.S | ||
sev-shared.c | ||
sev.c | ||
shstk.c | ||
signal_32.c | ||
signal_64.c | ||
signal.c | ||
smp.c | ||
smpboot.c | ||
stacktrace.c | ||
static_call.c | ||
step.c | ||
sys_ia32.c | ||
sys_x86_64.c | ||
tboot.c | ||
time.c | ||
tls.c | ||
tls.h | ||
topology.c | ||
trace_clock.c | ||
trace.c | ||
tracepoint.c | ||
traps.c | ||
tsc_msr.c | ||
tsc_sync.c | ||
tsc.c | ||
umip.c | ||
unwind_frame.c | ||
unwind_guess.c | ||
unwind_orc.c | ||
uprobes.c | ||
verify_cpu.S | ||
vm86_32.c | ||
vmlinux.lds.S | ||
vsmp_64.c | ||
x86_init.c |