linux/tools/arch
Linus Torvalds 97d8894b6f RISC-V Patches for the 6.12 Merge Window, Part 1
* Support for using Zkr to seed KASLR.
 * Support for IPI-triggered CPU backtracing.
 * Support for generic CPU vulnerabilities reporting to userspace.
 * A few cleanups for missing licenses.
 * The size limit on the XIP kernel has been removed.
 * Support for tracing userspace stacks.
 * Support for the Svvptc extension.
 * Various cleanups and fixes throughout the tree.
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Merge tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:

 - Support using Zkr to seed KASLR

 - Support IPI-triggered CPU backtracing

 - Support for generic CPU vulnerabilities reporting to userspace

 - A few cleanups for missing licenses

 - The size limit on the XIP kernel has been removed

 - Support for tracing userspace stacks

 - Support for the Svvptc extension

 - Various cleanups and fixes throughout the tree

* tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (47 commits)
  crash: Fix riscv64 crash memory reserve dead loop
  perf/riscv-sbi: Add platform specific firmware event handling
  tools: Optimize ring buffer for riscv
  tools: Add riscv barrier implementation
  RISC-V: Don't have MAX_PHYSMEM_BITS exceed phys_addr_t
  ACPI: NUMA: initialize all values of acpi_early_node_map to NUMA_NO_NODE
  riscv: Enable bitops instrumentation
  riscv: Omit optimized string routines when using KASAN
  ACPI: RISCV: Make acpi_numa_get_nid() to be static
  riscv: Randomize lower bits of stack address
  selftests: riscv: Allow mmap test to compile on 32-bit
  riscv: Make riscv_isa_vendor_ext_andes array static
  riscv: Use LIST_HEAD() to simplify code
  riscv: defconfig: Disable RZ/Five peripheral support
  RISC-V: Implement kgdb_roundup_cpus() to enable future NMI Roundup
  riscv: avoid Imbalance in RAS
  riscv: cacheinfo: Add back init_cache_level() function
  riscv: Remove unused _TIF_WORK_MASK
  drivers/perf: riscv: Remove redundant macro check
  riscv: define ILLEGAL_POINTER_VALUE for 64bit
  ...
2024-09-24 10:59:17 -07:00
..
alpha/include
arc/include/uapi/asm
arm/include
arm64 arm64: vDSO: Wire up getrandom() vDSO implementation 2024-09-13 17:28:36 +02:00
csky/include/uapi/asm
hexagon/include/uapi/asm tools arch: Remove uapi bitsperlong.h of hexagon and microblaze 2023-06-22 17:04:37 +02:00
loongarch LoongArch: vDSO: Wire up getrandom() vDSO implementation 2024-09-13 17:28:35 +02:00
microblaze/include/uapi/asm tools arch: Remove uapi bitsperlong.h of hexagon and microblaze 2023-06-22 17:04:37 +02:00
mips/include perf tools: Copy uapi/asm/perf_regs.h from the kernel for MIPS 2021-06-01 10:07:46 -03:00
parisc/include/uapi/asm parisc: Drop the HP-UX ENOSYM and EREMOTERELEASE error codes 2023-11-25 09:43:18 +01:00
powerpc powerpc/vdso: Wire up getrandom() vDSO implementation on VDSO32 2024-09-13 17:28:36 +02:00
riscv/include tools: Add riscv barrier implementation 2024-09-20 01:46:46 -07:00
s390 s390/vdso: Wire up getrandom() vdso implementation 2024-09-13 20:57:31 +02:00
sh/include
sparc/include
x86 Random number generator updates for Linux 6.12-rc1. 2024-09-18 15:26:31 +02:00
xtensa/include