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7d2078310c
RISC-V uses the same generic topology code as arm64 & while there currently exists no binding for cpu-capacity on RISC-V, the code paths can be hit if the property is present. Move the documentation of cpu-capacity to a shared location, ahead of defining a binding for capacity-dmips-mhz on RISC-V. Update some references to this document in the process. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Yanteng Si <siyanteng@loongson.cn> Link: https://lore.kernel.org/r/20230104180513.1379453-2-conor@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> |
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| .. | ||
| completion.rst | ||
| index.rst | ||
| sched-arch.rst | ||
| sched-bwc.rst | ||
| sched-capacity.rst | ||
| sched-debug.rst | ||
| sched-design-CFS.rst | ||
| sched-domains.rst | ||
| sched-energy.rst | ||
| sched-nice-design.rst | ||
| sched-stats.rst | ||
| schedutil.rst | ||