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edf9556472
As very well explained in commit 20a004e7b0
("arm64: mm: Use
READ_ONCE/WRITE_ONCE when accessing page tables"), an architecture whose
page table walker can modify the PTE in parallel must use
READ_ONCE()/WRITE_ONCE() macro to avoid any compiler transformation.
So apply that to riscv which is such architecture.
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Acked-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20231213203001.179237-5-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
794 lines
19 KiB
C
794 lines
19 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/hugetlb.h>
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#include <linux/module.h>
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#include <linux/uaccess.h>
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#include <linux/vmalloc.h>
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#include <linux/kvm_host.h>
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#include <linux/sched/signal.h>
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#include <asm/csr.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#ifdef CONFIG_64BIT
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static unsigned long gstage_mode __ro_after_init = (HGATP_MODE_SV39X4 << HGATP_MODE_SHIFT);
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static unsigned long gstage_pgd_levels __ro_after_init = 3;
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#define gstage_index_bits 9
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#else
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static unsigned long gstage_mode __ro_after_init = (HGATP_MODE_SV32X4 << HGATP_MODE_SHIFT);
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static unsigned long gstage_pgd_levels __ro_after_init = 2;
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#define gstage_index_bits 10
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#endif
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#define gstage_pgd_xbits 2
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#define gstage_pgd_size (1UL << (HGATP_PAGE_SHIFT + gstage_pgd_xbits))
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#define gstage_gpa_bits (HGATP_PAGE_SHIFT + \
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(gstage_pgd_levels * gstage_index_bits) + \
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gstage_pgd_xbits)
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#define gstage_gpa_size ((gpa_t)(1ULL << gstage_gpa_bits))
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#define gstage_pte_leaf(__ptep) \
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(pte_val(*(__ptep)) & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC))
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static inline unsigned long gstage_pte_index(gpa_t addr, u32 level)
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{
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unsigned long mask;
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unsigned long shift = HGATP_PAGE_SHIFT + (gstage_index_bits * level);
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if (level == (gstage_pgd_levels - 1))
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mask = (PTRS_PER_PTE * (1UL << gstage_pgd_xbits)) - 1;
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else
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mask = PTRS_PER_PTE - 1;
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return (addr >> shift) & mask;
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}
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static inline unsigned long gstage_pte_page_vaddr(pte_t pte)
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{
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return (unsigned long)pfn_to_virt(__page_val_to_pfn(pte_val(pte)));
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}
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static int gstage_page_size_to_level(unsigned long page_size, u32 *out_level)
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{
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u32 i;
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unsigned long psz = 1UL << 12;
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for (i = 0; i < gstage_pgd_levels; i++) {
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if (page_size == (psz << (i * gstage_index_bits))) {
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*out_level = i;
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return 0;
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}
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}
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return -EINVAL;
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}
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static int gstage_level_to_page_order(u32 level, unsigned long *out_pgorder)
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{
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if (gstage_pgd_levels < level)
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return -EINVAL;
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*out_pgorder = 12 + (level * gstage_index_bits);
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return 0;
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}
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static int gstage_level_to_page_size(u32 level, unsigned long *out_pgsize)
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{
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int rc;
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unsigned long page_order = PAGE_SHIFT;
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rc = gstage_level_to_page_order(level, &page_order);
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if (rc)
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return rc;
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*out_pgsize = BIT(page_order);
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return 0;
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}
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static bool gstage_get_leaf_entry(struct kvm *kvm, gpa_t addr,
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pte_t **ptepp, u32 *ptep_level)
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{
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pte_t *ptep;
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u32 current_level = gstage_pgd_levels - 1;
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*ptep_level = current_level;
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ptep = (pte_t *)kvm->arch.pgd;
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ptep = &ptep[gstage_pte_index(addr, current_level)];
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while (ptep && pte_val(ptep_get(ptep))) {
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if (gstage_pte_leaf(ptep)) {
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*ptep_level = current_level;
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*ptepp = ptep;
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return true;
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}
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if (current_level) {
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current_level--;
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*ptep_level = current_level;
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ptep = (pte_t *)gstage_pte_page_vaddr(ptep_get(ptep));
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ptep = &ptep[gstage_pte_index(addr, current_level)];
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} else {
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ptep = NULL;
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}
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}
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return false;
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}
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static void gstage_remote_tlb_flush(struct kvm *kvm, u32 level, gpa_t addr)
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{
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unsigned long order = PAGE_SHIFT;
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if (gstage_level_to_page_order(level, &order))
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return;
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addr &= ~(BIT(order) - 1);
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kvm_riscv_hfence_gvma_vmid_gpa(kvm, -1UL, 0, addr, BIT(order), order);
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}
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static int gstage_set_pte(struct kvm *kvm, u32 level,
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struct kvm_mmu_memory_cache *pcache,
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gpa_t addr, const pte_t *new_pte)
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{
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u32 current_level = gstage_pgd_levels - 1;
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pte_t *next_ptep = (pte_t *)kvm->arch.pgd;
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pte_t *ptep = &next_ptep[gstage_pte_index(addr, current_level)];
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if (current_level < level)
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return -EINVAL;
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while (current_level != level) {
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if (gstage_pte_leaf(ptep))
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return -EEXIST;
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if (!pte_val(ptep_get(ptep))) {
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if (!pcache)
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return -ENOMEM;
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next_ptep = kvm_mmu_memory_cache_alloc(pcache);
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if (!next_ptep)
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return -ENOMEM;
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set_pte(ptep, pfn_pte(PFN_DOWN(__pa(next_ptep)),
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__pgprot(_PAGE_TABLE)));
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} else {
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if (gstage_pte_leaf(ptep))
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return -EEXIST;
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next_ptep = (pte_t *)gstage_pte_page_vaddr(ptep_get(ptep));
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}
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current_level--;
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ptep = &next_ptep[gstage_pte_index(addr, current_level)];
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}
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set_pte(ptep, *new_pte);
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if (gstage_pte_leaf(ptep))
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gstage_remote_tlb_flush(kvm, current_level, addr);
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return 0;
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}
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static int gstage_map_page(struct kvm *kvm,
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struct kvm_mmu_memory_cache *pcache,
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gpa_t gpa, phys_addr_t hpa,
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unsigned long page_size,
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bool page_rdonly, bool page_exec)
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{
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int ret;
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u32 level = 0;
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pte_t new_pte;
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pgprot_t prot;
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ret = gstage_page_size_to_level(page_size, &level);
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if (ret)
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return ret;
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/*
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* A RISC-V implementation can choose to either:
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* 1) Update 'A' and 'D' PTE bits in hardware
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* 2) Generate page fault when 'A' and/or 'D' bits are not set
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* PTE so that software can update these bits.
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*
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* We support both options mentioned above. To achieve this, we
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* always set 'A' and 'D' PTE bits at time of creating G-stage
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* mapping. To support KVM dirty page logging with both options
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* mentioned above, we will write-protect G-stage PTEs to track
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* dirty pages.
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*/
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if (page_exec) {
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if (page_rdonly)
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prot = PAGE_READ_EXEC;
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else
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prot = PAGE_WRITE_EXEC;
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} else {
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if (page_rdonly)
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prot = PAGE_READ;
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else
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prot = PAGE_WRITE;
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}
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new_pte = pfn_pte(PFN_DOWN(hpa), prot);
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new_pte = pte_mkdirty(new_pte);
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return gstage_set_pte(kvm, level, pcache, gpa, &new_pte);
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}
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enum gstage_op {
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GSTAGE_OP_NOP = 0, /* Nothing */
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GSTAGE_OP_CLEAR, /* Clear/Unmap */
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GSTAGE_OP_WP, /* Write-protect */
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};
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static void gstage_op_pte(struct kvm *kvm, gpa_t addr,
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pte_t *ptep, u32 ptep_level, enum gstage_op op)
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{
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int i, ret;
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pte_t *next_ptep;
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u32 next_ptep_level;
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unsigned long next_page_size, page_size;
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ret = gstage_level_to_page_size(ptep_level, &page_size);
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if (ret)
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return;
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BUG_ON(addr & (page_size - 1));
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if (!pte_val(ptep_get(ptep)))
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return;
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if (ptep_level && !gstage_pte_leaf(ptep)) {
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next_ptep = (pte_t *)gstage_pte_page_vaddr(ptep_get(ptep));
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next_ptep_level = ptep_level - 1;
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ret = gstage_level_to_page_size(next_ptep_level,
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&next_page_size);
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if (ret)
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return;
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if (op == GSTAGE_OP_CLEAR)
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set_pte(ptep, __pte(0));
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for (i = 0; i < PTRS_PER_PTE; i++)
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gstage_op_pte(kvm, addr + i * next_page_size,
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&next_ptep[i], next_ptep_level, op);
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if (op == GSTAGE_OP_CLEAR)
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put_page(virt_to_page(next_ptep));
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} else {
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if (op == GSTAGE_OP_CLEAR)
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set_pte(ptep, __pte(0));
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else if (op == GSTAGE_OP_WP)
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set_pte(ptep, __pte(pte_val(ptep_get(ptep)) & ~_PAGE_WRITE));
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gstage_remote_tlb_flush(kvm, ptep_level, addr);
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}
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}
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static void gstage_unmap_range(struct kvm *kvm, gpa_t start,
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gpa_t size, bool may_block)
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{
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int ret;
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pte_t *ptep;
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u32 ptep_level;
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bool found_leaf;
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unsigned long page_size;
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gpa_t addr = start, end = start + size;
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while (addr < end) {
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found_leaf = gstage_get_leaf_entry(kvm, addr,
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&ptep, &ptep_level);
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ret = gstage_level_to_page_size(ptep_level, &page_size);
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if (ret)
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break;
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if (!found_leaf)
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goto next;
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if (!(addr & (page_size - 1)) && ((end - addr) >= page_size))
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gstage_op_pte(kvm, addr, ptep,
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ptep_level, GSTAGE_OP_CLEAR);
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next:
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addr += page_size;
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/*
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* If the range is too large, release the kvm->mmu_lock
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* to prevent starvation and lockup detector warnings.
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*/
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if (may_block && addr < end)
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cond_resched_lock(&kvm->mmu_lock);
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}
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}
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static void gstage_wp_range(struct kvm *kvm, gpa_t start, gpa_t end)
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{
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int ret;
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pte_t *ptep;
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u32 ptep_level;
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bool found_leaf;
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gpa_t addr = start;
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unsigned long page_size;
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while (addr < end) {
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found_leaf = gstage_get_leaf_entry(kvm, addr,
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&ptep, &ptep_level);
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ret = gstage_level_to_page_size(ptep_level, &page_size);
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if (ret)
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break;
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if (!found_leaf)
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goto next;
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if (!(addr & (page_size - 1)) && ((end - addr) >= page_size))
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gstage_op_pte(kvm, addr, ptep,
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ptep_level, GSTAGE_OP_WP);
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next:
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addr += page_size;
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}
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}
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static void gstage_wp_memory_region(struct kvm *kvm, int slot)
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{
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struct kvm_memslots *slots = kvm_memslots(kvm);
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struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
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phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
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phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
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spin_lock(&kvm->mmu_lock);
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gstage_wp_range(kvm, start, end);
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spin_unlock(&kvm->mmu_lock);
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kvm_flush_remote_tlbs(kvm);
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}
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int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_t gpa,
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phys_addr_t hpa, unsigned long size,
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bool writable, bool in_atomic)
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{
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pte_t pte;
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int ret = 0;
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unsigned long pfn;
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phys_addr_t addr, end;
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struct kvm_mmu_memory_cache pcache = {
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.gfp_custom = (in_atomic) ? GFP_ATOMIC | __GFP_ACCOUNT : 0,
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.gfp_zero = __GFP_ZERO,
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};
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end = (gpa + size + PAGE_SIZE - 1) & PAGE_MASK;
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pfn = __phys_to_pfn(hpa);
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for (addr = gpa; addr < end; addr += PAGE_SIZE) {
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pte = pfn_pte(pfn, PAGE_KERNEL_IO);
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if (!writable)
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pte = pte_wrprotect(pte);
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ret = kvm_mmu_topup_memory_cache(&pcache, gstage_pgd_levels);
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if (ret)
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goto out;
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spin_lock(&kvm->mmu_lock);
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ret = gstage_set_pte(kvm, 0, &pcache, addr, &pte);
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spin_unlock(&kvm->mmu_lock);
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if (ret)
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goto out;
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pfn++;
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}
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out:
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kvm_mmu_free_memory_cache(&pcache);
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return ret;
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}
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void kvm_riscv_gstage_iounmap(struct kvm *kvm, gpa_t gpa, unsigned long size)
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{
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spin_lock(&kvm->mmu_lock);
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gstage_unmap_range(kvm, gpa, size, false);
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spin_unlock(&kvm->mmu_lock);
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}
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void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
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struct kvm_memory_slot *slot,
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gfn_t gfn_offset,
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unsigned long mask)
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{
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phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
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phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
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phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
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gstage_wp_range(kvm, start, end);
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}
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void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
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{
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}
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void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free)
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{
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}
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void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
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{
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}
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void kvm_arch_flush_shadow_all(struct kvm *kvm)
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{
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kvm_riscv_gstage_free_pgd(kvm);
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}
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void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
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struct kvm_memory_slot *slot)
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{
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gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
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phys_addr_t size = slot->npages << PAGE_SHIFT;
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spin_lock(&kvm->mmu_lock);
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gstage_unmap_range(kvm, gpa, size, false);
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spin_unlock(&kvm->mmu_lock);
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}
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void kvm_arch_commit_memory_region(struct kvm *kvm,
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struct kvm_memory_slot *old,
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const struct kvm_memory_slot *new,
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enum kvm_mr_change change)
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{
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/*
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* At this point memslot has been committed and there is an
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* allocated dirty_bitmap[], dirty pages will be tracked while
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* the memory slot is write protected.
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*/
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if (change != KVM_MR_DELETE && new->flags & KVM_MEM_LOG_DIRTY_PAGES)
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gstage_wp_memory_region(kvm, new->id);
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}
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int kvm_arch_prepare_memory_region(struct kvm *kvm,
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const struct kvm_memory_slot *old,
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struct kvm_memory_slot *new,
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enum kvm_mr_change change)
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{
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hva_t hva, reg_end, size;
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gpa_t base_gpa;
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bool writable;
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int ret = 0;
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if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
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change != KVM_MR_FLAGS_ONLY)
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return 0;
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/*
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* Prevent userspace from creating a memory region outside of the GPA
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* space addressable by the KVM guest GPA space.
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*/
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if ((new->base_gfn + new->npages) >=
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(gstage_gpa_size >> PAGE_SHIFT))
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return -EFAULT;
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hva = new->userspace_addr;
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size = new->npages << PAGE_SHIFT;
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reg_end = hva + size;
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base_gpa = new->base_gfn << PAGE_SHIFT;
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writable = !(new->flags & KVM_MEM_READONLY);
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mmap_read_lock(current->mm);
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/*
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* A memory region could potentially cover multiple VMAs, and
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* any holes between them, so iterate over all of them to find
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* out if we can map any of them right now.
|
|
*
|
|
* +--------------------------------------------+
|
|
* +---------------+----------------+ +----------------+
|
|
* | : VMA 1 | VMA 2 | | VMA 3 : |
|
|
* +---------------+----------------+ +----------------+
|
|
* | memory region |
|
|
* +--------------------------------------------+
|
|
*/
|
|
do {
|
|
struct vm_area_struct *vma = find_vma(current->mm, hva);
|
|
hva_t vm_start, vm_end;
|
|
|
|
if (!vma || vma->vm_start >= reg_end)
|
|
break;
|
|
|
|
/*
|
|
* Mapping a read-only VMA is only allowed if the
|
|
* memory region is configured as read-only.
|
|
*/
|
|
if (writable && !(vma->vm_flags & VM_WRITE)) {
|
|
ret = -EPERM;
|
|
break;
|
|
}
|
|
|
|
/* Take the intersection of this VMA with the memory region */
|
|
vm_start = max(hva, vma->vm_start);
|
|
vm_end = min(reg_end, vma->vm_end);
|
|
|
|
if (vma->vm_flags & VM_PFNMAP) {
|
|
gpa_t gpa = base_gpa + (vm_start - hva);
|
|
phys_addr_t pa;
|
|
|
|
pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
|
|
pa += vm_start - vma->vm_start;
|
|
|
|
/* IO region dirty page logging not allowed */
|
|
if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
ret = kvm_riscv_gstage_ioremap(kvm, gpa, pa,
|
|
vm_end - vm_start,
|
|
writable, false);
|
|
if (ret)
|
|
break;
|
|
}
|
|
hva = vm_end;
|
|
} while (hva < reg_end);
|
|
|
|
if (change == KVM_MR_FLAGS_ONLY)
|
|
goto out;
|
|
|
|
if (ret)
|
|
kvm_riscv_gstage_iounmap(kvm, base_gpa, size);
|
|
|
|
out:
|
|
mmap_read_unlock(current->mm);
|
|
return ret;
|
|
}
|
|
|
|
bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
|
|
{
|
|
if (!kvm->arch.pgd)
|
|
return false;
|
|
|
|
gstage_unmap_range(kvm, range->start << PAGE_SHIFT,
|
|
(range->end - range->start) << PAGE_SHIFT,
|
|
range->may_block);
|
|
return false;
|
|
}
|
|
|
|
bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
|
|
{
|
|
int ret;
|
|
kvm_pfn_t pfn = pte_pfn(range->arg.pte);
|
|
|
|
if (!kvm->arch.pgd)
|
|
return false;
|
|
|
|
WARN_ON(range->end - range->start != 1);
|
|
|
|
ret = gstage_map_page(kvm, NULL, range->start << PAGE_SHIFT,
|
|
__pfn_to_phys(pfn), PAGE_SIZE, true, true);
|
|
if (ret) {
|
|
kvm_debug("Failed to map G-stage page (error %d)\n", ret);
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
|
|
{
|
|
pte_t *ptep;
|
|
u32 ptep_level = 0;
|
|
u64 size = (range->end - range->start) << PAGE_SHIFT;
|
|
|
|
if (!kvm->arch.pgd)
|
|
return false;
|
|
|
|
WARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);
|
|
|
|
if (!gstage_get_leaf_entry(kvm, range->start << PAGE_SHIFT,
|
|
&ptep, &ptep_level))
|
|
return false;
|
|
|
|
return ptep_test_and_clear_young(NULL, 0, ptep);
|
|
}
|
|
|
|
bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
|
|
{
|
|
pte_t *ptep;
|
|
u32 ptep_level = 0;
|
|
u64 size = (range->end - range->start) << PAGE_SHIFT;
|
|
|
|
if (!kvm->arch.pgd)
|
|
return false;
|
|
|
|
WARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);
|
|
|
|
if (!gstage_get_leaf_entry(kvm, range->start << PAGE_SHIFT,
|
|
&ptep, &ptep_level))
|
|
return false;
|
|
|
|
return pte_young(ptep_get(ptep));
|
|
}
|
|
|
|
int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
|
|
struct kvm_memory_slot *memslot,
|
|
gpa_t gpa, unsigned long hva, bool is_write)
|
|
{
|
|
int ret;
|
|
kvm_pfn_t hfn;
|
|
bool writable;
|
|
short vma_pageshift;
|
|
gfn_t gfn = gpa >> PAGE_SHIFT;
|
|
struct vm_area_struct *vma;
|
|
struct kvm *kvm = vcpu->kvm;
|
|
struct kvm_mmu_memory_cache *pcache = &vcpu->arch.mmu_page_cache;
|
|
bool logging = (memslot->dirty_bitmap &&
|
|
!(memslot->flags & KVM_MEM_READONLY)) ? true : false;
|
|
unsigned long vma_pagesize, mmu_seq;
|
|
|
|
/* We need minimum second+third level pages */
|
|
ret = kvm_mmu_topup_memory_cache(pcache, gstage_pgd_levels);
|
|
if (ret) {
|
|
kvm_err("Failed to topup G-stage cache\n");
|
|
return ret;
|
|
}
|
|
|
|
mmap_read_lock(current->mm);
|
|
|
|
vma = vma_lookup(current->mm, hva);
|
|
if (unlikely(!vma)) {
|
|
kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
|
|
mmap_read_unlock(current->mm);
|
|
return -EFAULT;
|
|
}
|
|
|
|
if (is_vm_hugetlb_page(vma))
|
|
vma_pageshift = huge_page_shift(hstate_vma(vma));
|
|
else
|
|
vma_pageshift = PAGE_SHIFT;
|
|
vma_pagesize = 1ULL << vma_pageshift;
|
|
if (logging || (vma->vm_flags & VM_PFNMAP))
|
|
vma_pagesize = PAGE_SIZE;
|
|
|
|
if (vma_pagesize == PMD_SIZE || vma_pagesize == PUD_SIZE)
|
|
gfn = (gpa & huge_page_mask(hstate_vma(vma))) >> PAGE_SHIFT;
|
|
|
|
/*
|
|
* Read mmu_invalidate_seq so that KVM can detect if the results of
|
|
* vma_lookup() or gfn_to_pfn_prot() become stale priort to acquiring
|
|
* kvm->mmu_lock.
|
|
*
|
|
* Rely on mmap_read_unlock() for an implicit smp_rmb(), which pairs
|
|
* with the smp_wmb() in kvm_mmu_invalidate_end().
|
|
*/
|
|
mmu_seq = kvm->mmu_invalidate_seq;
|
|
mmap_read_unlock(current->mm);
|
|
|
|
if (vma_pagesize != PUD_SIZE &&
|
|
vma_pagesize != PMD_SIZE &&
|
|
vma_pagesize != PAGE_SIZE) {
|
|
kvm_err("Invalid VMA page size 0x%lx\n", vma_pagesize);
|
|
return -EFAULT;
|
|
}
|
|
|
|
hfn = gfn_to_pfn_prot(kvm, gfn, is_write, &writable);
|
|
if (hfn == KVM_PFN_ERR_HWPOISON) {
|
|
send_sig_mceerr(BUS_MCEERR_AR, (void __user *)hva,
|
|
vma_pageshift, current);
|
|
return 0;
|
|
}
|
|
if (is_error_noslot_pfn(hfn))
|
|
return -EFAULT;
|
|
|
|
/*
|
|
* If logging is active then we allow writable pages only
|
|
* for write faults.
|
|
*/
|
|
if (logging && !is_write)
|
|
writable = false;
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
if (mmu_invalidate_retry(kvm, mmu_seq))
|
|
goto out_unlock;
|
|
|
|
if (writable) {
|
|
kvm_set_pfn_dirty(hfn);
|
|
mark_page_dirty(kvm, gfn);
|
|
ret = gstage_map_page(kvm, pcache, gpa, hfn << PAGE_SHIFT,
|
|
vma_pagesize, false, true);
|
|
} else {
|
|
ret = gstage_map_page(kvm, pcache, gpa, hfn << PAGE_SHIFT,
|
|
vma_pagesize, true, true);
|
|
}
|
|
|
|
if (ret)
|
|
kvm_err("Failed to map in G-stage\n");
|
|
|
|
out_unlock:
|
|
spin_unlock(&kvm->mmu_lock);
|
|
kvm_set_pfn_accessed(hfn);
|
|
kvm_release_pfn_clean(hfn);
|
|
return ret;
|
|
}
|
|
|
|
int kvm_riscv_gstage_alloc_pgd(struct kvm *kvm)
|
|
{
|
|
struct page *pgd_page;
|
|
|
|
if (kvm->arch.pgd != NULL) {
|
|
kvm_err("kvm_arch already initialized?\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
pgd_page = alloc_pages(GFP_KERNEL | __GFP_ZERO,
|
|
get_order(gstage_pgd_size));
|
|
if (!pgd_page)
|
|
return -ENOMEM;
|
|
kvm->arch.pgd = page_to_virt(pgd_page);
|
|
kvm->arch.pgd_phys = page_to_phys(pgd_page);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void kvm_riscv_gstage_free_pgd(struct kvm *kvm)
|
|
{
|
|
void *pgd = NULL;
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
if (kvm->arch.pgd) {
|
|
gstage_unmap_range(kvm, 0UL, gstage_gpa_size, false);
|
|
pgd = READ_ONCE(kvm->arch.pgd);
|
|
kvm->arch.pgd = NULL;
|
|
kvm->arch.pgd_phys = 0;
|
|
}
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
if (pgd)
|
|
free_pages((unsigned long)pgd, get_order(gstage_pgd_size));
|
|
}
|
|
|
|
void kvm_riscv_gstage_update_hgatp(struct kvm_vcpu *vcpu)
|
|
{
|
|
unsigned long hgatp = gstage_mode;
|
|
struct kvm_arch *k = &vcpu->kvm->arch;
|
|
|
|
hgatp |= (READ_ONCE(k->vmid.vmid) << HGATP_VMID_SHIFT) & HGATP_VMID;
|
|
hgatp |= (k->pgd_phys >> PAGE_SHIFT) & HGATP_PPN;
|
|
|
|
csr_write(CSR_HGATP, hgatp);
|
|
|
|
if (!kvm_riscv_gstage_vmid_bits())
|
|
kvm_riscv_local_hfence_gvma_all();
|
|
}
|
|
|
|
void __init kvm_riscv_gstage_mode_detect(void)
|
|
{
|
|
#ifdef CONFIG_64BIT
|
|
/* Try Sv57x4 G-stage mode */
|
|
csr_write(CSR_HGATP, HGATP_MODE_SV57X4 << HGATP_MODE_SHIFT);
|
|
if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV57X4) {
|
|
gstage_mode = (HGATP_MODE_SV57X4 << HGATP_MODE_SHIFT);
|
|
gstage_pgd_levels = 5;
|
|
goto skip_sv48x4_test;
|
|
}
|
|
|
|
/* Try Sv48x4 G-stage mode */
|
|
csr_write(CSR_HGATP, HGATP_MODE_SV48X4 << HGATP_MODE_SHIFT);
|
|
if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV48X4) {
|
|
gstage_mode = (HGATP_MODE_SV48X4 << HGATP_MODE_SHIFT);
|
|
gstage_pgd_levels = 4;
|
|
}
|
|
skip_sv48x4_test:
|
|
|
|
csr_write(CSR_HGATP, 0);
|
|
kvm_riscv_local_hfence_gvma_all();
|
|
#endif
|
|
}
|
|
|
|
unsigned long __init kvm_riscv_gstage_mode(void)
|
|
{
|
|
return gstage_mode >> HGATP_MODE_SHIFT;
|
|
}
|
|
|
|
int kvm_riscv_gstage_gpa_bits(void)
|
|
{
|
|
return gstage_gpa_bits;
|
|
}
|