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a7fadac10f
The exynos4 updates conflict with code from the arm devel-stable branch and new boards need to set atag_offset in place of boot_param. Conflicts: arch/arm/Kconfig arch/arm/mach-exynos4/include/mach/entry-macro.S arch/arm/mach-exynos4/mach-smdkc210.c arch/arm/mach-exynos4/mach-smdkv310.c arch/arm/mach-exynos4/mct.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
365 lines
9.9 KiB
C
365 lines
9.9 KiB
C
/*
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* arch/arm/mach-ep93xx/vision_ep9307.c
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* Vision Engraving Systems EP9307 SoM support.
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*
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* Copyright (C) 2008-2011 Vision Engraving Systems
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* H Hartley Sweeten <hsweeten@visionengravers.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/fb.h>
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#include <linux/io.h>
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#include <linux/mtd/partitions.h>
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#include <linux/i2c.h>
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#include <linux/i2c-gpio.h>
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#include <linux/i2c/pca953x.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/spi/mmc_spi.h>
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#include <linux/mmc/host.h>
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#include <mach/hardware.h>
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#include <mach/fb.h>
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#include <mach/ep93xx_spi.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <asm/mach/arch.h>
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/*************************************************************************
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* Static I/O mappings for the FPGA
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*************************************************************************/
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#define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE
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#define VISION_VIRT_BASE 0xfebff000
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static struct map_desc vision_io_desc[] __initdata = {
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{
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.virtual = VISION_VIRT_BASE,
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.pfn = __phys_to_pfn(VISION_PHYS_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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static void __init vision_map_io(void)
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{
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ep93xx_map_io();
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iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc));
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}
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/*************************************************************************
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* Ethernet
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*************************************************************************/
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static struct ep93xx_eth_data vision_eth_data __initdata = {
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.phy_id = 1,
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};
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/*************************************************************************
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* Framebuffer
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*************************************************************************/
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#define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1
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static int vision_lcd_setup(struct platform_device *pdev)
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{
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int err;
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err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH,
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dev_name(&pdev->dev));
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if (err)
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return err;
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ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS |
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EP93XX_SYSCON_DEVCFG_RASONP3 |
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EP93XX_SYSCON_DEVCFG_EXVC);
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return 0;
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}
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static void vision_lcd_teardown(struct platform_device *pdev)
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{
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gpio_free(VISION_LCD_ENABLE);
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}
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static void vision_lcd_blank(int blank_mode, struct fb_info *info)
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{
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if (blank_mode)
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gpio_set_value(VISION_LCD_ENABLE, 0);
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else
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gpio_set_value(VISION_LCD_ENABLE, 1);
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}
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static struct ep93xxfb_mach_info ep93xxfb_info __initdata = {
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.num_modes = EP93XXFB_USE_MODEDB,
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.bpp = 16,
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.flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,
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.setup = vision_lcd_setup,
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.teardown = vision_lcd_teardown,
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.blank = vision_lcd_blank,
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};
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/*************************************************************************
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* GPIO Expanders
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*************************************************************************/
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#define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1)
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#define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16)
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#define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16)
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#define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16)
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static struct pca953x_platform_data pca953x_74_gpio_data = {
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.gpio_base = PCA9539_74_GPIO_BASE,
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.irq_base = EP93XX_BOARD_IRQ(0),
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};
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static struct pca953x_platform_data pca953x_75_gpio_data = {
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.gpio_base = PCA9539_75_GPIO_BASE,
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.irq_base = -1,
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};
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static struct pca953x_platform_data pca953x_76_gpio_data = {
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.gpio_base = PCA9539_76_GPIO_BASE,
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.irq_base = -1,
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};
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static struct pca953x_platform_data pca953x_77_gpio_data = {
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.gpio_base = PCA9539_77_GPIO_BASE,
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.irq_base = -1,
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};
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/*************************************************************************
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* I2C Bus
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*************************************************************************/
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static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = {
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.sda_pin = EP93XX_GPIO_LINE_EEDAT,
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.scl_pin = EP93XX_GPIO_LINE_EECLK,
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};
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static struct i2c_board_info vision_i2c_info[] __initdata = {
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{
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I2C_BOARD_INFO("isl1208", 0x6f),
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.irq = IRQ_EP93XX_EXT1,
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}, {
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I2C_BOARD_INFO("pca9539", 0x74),
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.platform_data = &pca953x_74_gpio_data,
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.irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)),
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}, {
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I2C_BOARD_INFO("pca9539", 0x75),
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.platform_data = &pca953x_75_gpio_data,
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}, {
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I2C_BOARD_INFO("pca9539", 0x76),
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.platform_data = &pca953x_76_gpio_data,
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}, {
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I2C_BOARD_INFO("pca9539", 0x77),
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.platform_data = &pca953x_77_gpio_data,
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},
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};
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/*************************************************************************
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* SPI Flash
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*************************************************************************/
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#define VISION_SPI_FLASH_CS EP93XX_GPIO_LINE_EGPIO7
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static struct mtd_partition vision_spi_flash_partitions[] = {
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{
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.name = "SPI bootstrap",
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.offset = 0,
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.size = SZ_4K,
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}, {
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.name = "Bootstrap config",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_4K,
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}, {
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.name = "System config",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct flash_platform_data vision_spi_flash_data = {
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.name = "SPI Flash",
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.parts = vision_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(vision_spi_flash_partitions),
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};
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static int vision_spi_flash_hw_setup(struct spi_device *spi)
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{
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return gpio_request_one(VISION_SPI_FLASH_CS, GPIOF_INIT_HIGH,
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spi->modalias);
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}
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static void vision_spi_flash_hw_cleanup(struct spi_device *spi)
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{
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gpio_free(VISION_SPI_FLASH_CS);
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}
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static void vision_spi_flash_hw_cs_control(struct spi_device *spi, int value)
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{
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gpio_set_value(VISION_SPI_FLASH_CS, value);
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}
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static struct ep93xx_spi_chip_ops vision_spi_flash_hw = {
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.setup = vision_spi_flash_hw_setup,
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.cleanup = vision_spi_flash_hw_cleanup,
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.cs_control = vision_spi_flash_hw_cs_control,
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};
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/*************************************************************************
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* SPI SD/MMC host
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*************************************************************************/
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#define VISION_SPI_MMC_CS EP93XX_GPIO_LINE_G(2)
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#define VISION_SPI_MMC_WP EP93XX_GPIO_LINE_F(0)
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#define VISION_SPI_MMC_CD EP93XX_GPIO_LINE_EGPIO15
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static struct gpio vision_spi_mmc_gpios[] = {
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{ VISION_SPI_MMC_WP, GPIOF_DIR_IN, "mmc_spi:wp" },
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{ VISION_SPI_MMC_CD, GPIOF_DIR_IN, "mmc_spi:cd" },
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};
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static int vision_spi_mmc_init(struct device *pdev,
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irqreturn_t (*func)(int, void *), void *pdata)
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{
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int err;
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err = gpio_request_array(vision_spi_mmc_gpios,
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ARRAY_SIZE(vision_spi_mmc_gpios));
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if (err)
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return err;
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err = gpio_set_debounce(VISION_SPI_MMC_CD, 1);
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if (err)
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goto exit_err;
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err = request_irq(gpio_to_irq(VISION_SPI_MMC_CD), func,
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IRQ_TYPE_EDGE_BOTH, "mmc_spi:cd", pdata);
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if (err)
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goto exit_err;
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return 0;
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exit_err:
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gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios));
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return err;
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}
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static void vision_spi_mmc_exit(struct device *pdev, void *pdata)
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{
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free_irq(gpio_to_irq(VISION_SPI_MMC_CD), pdata);
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gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios));
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}
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static int vision_spi_mmc_get_ro(struct device *pdev)
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{
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return !!gpio_get_value(VISION_SPI_MMC_WP);
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}
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static int vision_spi_mmc_get_cd(struct device *pdev)
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{
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return !gpio_get_value(VISION_SPI_MMC_CD);
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}
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static struct mmc_spi_platform_data vision_spi_mmc_data = {
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.init = vision_spi_mmc_init,
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.exit = vision_spi_mmc_exit,
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.get_ro = vision_spi_mmc_get_ro,
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.get_cd = vision_spi_mmc_get_cd,
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.detect_delay = 100,
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.powerup_msecs = 100,
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.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
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};
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static int vision_spi_mmc_hw_setup(struct spi_device *spi)
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{
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return gpio_request_one(VISION_SPI_MMC_CS, GPIOF_INIT_HIGH,
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spi->modalias);
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}
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static void vision_spi_mmc_hw_cleanup(struct spi_device *spi)
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{
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gpio_free(VISION_SPI_MMC_CS);
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}
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static void vision_spi_mmc_hw_cs_control(struct spi_device *spi, int value)
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{
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gpio_set_value(VISION_SPI_MMC_CS, value);
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}
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static struct ep93xx_spi_chip_ops vision_spi_mmc_hw = {
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.setup = vision_spi_mmc_hw_setup,
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.cleanup = vision_spi_mmc_hw_cleanup,
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.cs_control = vision_spi_mmc_hw_cs_control,
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};
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/*************************************************************************
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* SPI Bus
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*************************************************************************/
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static struct spi_board_info vision_spi_board_info[] __initdata = {
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{
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.modalias = "sst25l",
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.platform_data = &vision_spi_flash_data,
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.controller_data = &vision_spi_flash_hw,
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.max_speed_hz = 20000000,
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.bus_num = 0,
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.chip_select = 0,
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.mode = SPI_MODE_3,
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}, {
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.modalias = "mmc_spi",
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.platform_data = &vision_spi_mmc_data,
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.controller_data = &vision_spi_mmc_hw,
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.max_speed_hz = 20000000,
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.bus_num = 0,
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.chip_select = 1,
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.mode = SPI_MODE_3,
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},
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};
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static struct ep93xx_spi_info vision_spi_master __initdata = {
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.num_chipselect = ARRAY_SIZE(vision_spi_board_info),
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};
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/*************************************************************************
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* Machine Initialization
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*************************************************************************/
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static void __init vision_init_machine(void)
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{
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ep93xx_init_devices();
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ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M);
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ep93xx_register_eth(&vision_eth_data, 1);
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ep93xx_register_fb(&ep93xxfb_info);
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ep93xx_register_pwm(1, 0);
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/*
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* Request the gpio expander's interrupt gpio line now to prevent
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* the kernel from doing a WARN in gpiolib:gpio_ensure_requested().
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*/
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if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN,
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"pca9539:74"))
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pr_warn("cannot request interrupt gpio for pca9539:74\n");
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ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info,
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ARRAY_SIZE(vision_i2c_info));
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ep93xx_register_spi(&vision_spi_master, vision_spi_board_info,
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ARRAY_SIZE(vision_spi_board_info));
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}
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MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
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/* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
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.atag_offset = 0x100,
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.map_io = vision_map_io,
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.init_irq = ep93xx_init_irq,
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.timer = &ep93xx_timer,
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.init_machine = vision_init_machine,
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MACHINE_END
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