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e189624916
Current ACPI ARM64 NUMA initialization code in
acpi_numa_gicc_affinity_init()
carries out NUMA nodes creation and cpu<->node mappings at the same time
in the arch backend so that a single SRAT walk is needed to parse both
pieces of information. This implies that the cpu<->node mappings must
be stashed in an array (sized NR_CPUS) so that SMP code can later use
the stashed values to avoid another SRAT table walk to set-up the early
cpu<->node mappings.
If the kernel is configured with a NR_CPUS value less than the actual
processor entries in the SRAT (and MADT), the logic in
acpi_numa_gicc_affinity_init() is broken in that the cpu<->node mapping
is only carried out (and stashed for future use) only for a number of
SRAT entries up to NR_CPUS, which do not necessarily correspond to the
possible cpus detected at SMP initialization in
acpi_map_gic_cpu_interface() (ie MADT and SRAT processor entries order
is not enforced), which leaves the kernel with broken cpu<->node
mappings.
Furthermore, given the current ACPI NUMA code parsing logic in
acpi_numa_gicc_affinity_init(), PXM domains for CPUs that are not parsed
because they exceed NR_CPUS entries are not mapped to NUMA nodes (ie the
PXM corresponding node is not created in the kernel) leaving the system
with a broken NUMA topology.
Rework the ACPI ARM64 NUMA initialization process so that the NUMA
nodes creation and cpu<->node mappings are decoupled. cpu<->node
mappings are moved to SMP initialization code (where they are needed),
at the cost of an extra SRAT walk so that ACPI NUMA mappings can be
batched before being applied, fixing current parsing pitfalls.
Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
Tested-by: John Garry <john.garry@huawei.com>
Fixes: d8b47fca8c ("arm64, ACPI, NUMA: NUMA support based on SRAT and
SLIT")
Link: http://lkml.kernel.org/r/1527768879-88161-2-git-send-email-xiexiuqi@huawei.com
Reported-by: Xie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Punit Agrawal <punit.agrawal@arm.com>
Cc: Jonathan Cameron <jonathan.cameron@huawei.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Hanjun Guo <guohanjun@huawei.com>
Cc: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
Cc: Jeremy Linton <jeremy.linton@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Xie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
148 lines
4.1 KiB
C
148 lines
4.1 KiB
C
/*
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* Copyright (C) 2013-2014, Linaro Ltd.
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* Author: Al Stone <al.stone@linaro.org>
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* Author: Graeme Gregory <graeme.gregory@linaro.org>
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* Author: Hanjun Guo <hanjun.guo@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation;
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*/
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#ifndef _ASM_ACPI_H
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#define _ASM_ACPI_H
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#include <linux/memblock.h>
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#include <linux/psci.h>
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#include <asm/cputype.h>
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#include <asm/smp_plat.h>
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#include <asm/tlbflush.h>
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/* Macros for consistency checks of the GICC subtable of MADT */
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#define ACPI_MADT_GICC_LENGTH \
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(acpi_gbl_FADT.header.revision < 6 ? 76 : 80)
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#define BAD_MADT_GICC_ENTRY(entry, end) \
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(!(entry) || (entry)->header.length != ACPI_MADT_GICC_LENGTH || \
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(unsigned long)(entry) + ACPI_MADT_GICC_LENGTH > (end))
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/* Basic configuration for ACPI */
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#ifdef CONFIG_ACPI
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/* ACPI table mapping after acpi_permanent_mmap is set */
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static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
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acpi_size size)
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{
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/*
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* EFI's reserve_regions() call adds memory with the WB attribute
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* to memblock via early_init_dt_add_memory_arch().
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*/
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if (!memblock_is_memory(phys))
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return ioremap(phys, size);
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return ioremap_cache(phys, size);
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}
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#define acpi_os_ioremap acpi_os_ioremap
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typedef u64 phys_cpuid_t;
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#define PHYS_CPUID_INVALID INVALID_HWID
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#define acpi_strict 1 /* No out-of-spec workarounds on ARM64 */
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extern int acpi_disabled;
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extern int acpi_noirq;
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extern int acpi_pci_disabled;
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static inline void disable_acpi(void)
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{
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acpi_disabled = 1;
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acpi_pci_disabled = 1;
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acpi_noirq = 1;
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}
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static inline void enable_acpi(void)
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{
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acpi_disabled = 0;
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acpi_pci_disabled = 0;
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acpi_noirq = 0;
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}
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/*
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* The ACPI processor driver for ACPI core code needs this macro
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* to find out this cpu was already mapped (mapping from CPU hardware
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* ID to CPU logical ID) or not.
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*/
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#define cpu_physical_id(cpu) cpu_logical_map(cpu)
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/*
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* It's used from ACPI core in kdump to boot UP system with SMP kernel,
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* with this check the ACPI core will not override the CPU index
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* obtained from GICC with 0 and not print some error message as well.
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* Since MADT must provide at least one GICC structure for GIC
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* initialization, CPU will be always available in MADT on ARM64.
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*/
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static inline bool acpi_has_cpu_in_madt(void)
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{
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return true;
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}
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struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu);
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static inline u32 get_acpi_id_for_cpu(unsigned int cpu)
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{
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return acpi_cpu_get_madt_gicc(cpu)->uid;
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}
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static inline void arch_fix_phys_package_id(int num, u32 slot) { }
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void __init acpi_init_cpus(void);
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#else
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static inline void acpi_init_cpus(void) { }
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#endif /* CONFIG_ACPI */
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#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
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bool acpi_parking_protocol_valid(int cpu);
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void __init
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acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor);
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#else
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static inline bool acpi_parking_protocol_valid(int cpu) { return false; }
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static inline void
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acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)
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{}
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#endif
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static inline const char *acpi_get_enable_method(int cpu)
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{
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if (acpi_psci_present())
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return "psci";
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if (acpi_parking_protocol_valid(cpu))
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return "parking-protocol";
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return NULL;
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}
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#ifdef CONFIG_ACPI_APEI
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/*
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* acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
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* IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
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* with a kernel command line parameter "acpi=nocmcoff". But we don't
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* have this IA-32 specific feature on ARM64, this definition is only
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* for compatibility.
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*/
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#define acpi_disable_cmcff 1
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pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
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#endif /* CONFIG_ACPI_APEI */
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#ifdef CONFIG_ACPI_NUMA
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int arm64_acpi_numa_init(void);
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int acpi_numa_get_nid(unsigned int cpu);
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void acpi_map_cpus_to_nodes(void);
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#else
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static inline int arm64_acpi_numa_init(void) { return -ENOSYS; }
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static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
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static inline void acpi_map_cpus_to_nodes(void) { }
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#endif /* CONFIG_ACPI_NUMA */
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#define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE
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#endif /*_ASM_ACPI_H*/
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