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The generic tlb_end_vma does not call invalidate_range mmu notifier, and it resets resets the mmu_gather range, which means the notifier won't be called on part of the range in case of an unmap that spans multiple vmas. ARM64 seems to be the only arch I could see that has notifiers and uses the generic tlb_end_vma. I have not actually tested it. [ Catalin and Will point out that ARM64 currently only uses the notifiers for KVM, which doesn't use the ->invalidate_range() callback right now, so it's a bug, but one that happens to not affect them. So not necessary for stable. - Linus ] Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
316 lines
9.4 KiB
C
316 lines
9.4 KiB
C
/* include/asm-generic/tlb.h
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*
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* Generic TLB shootdown code
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*
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* Copyright 2001 Red Hat, Inc.
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* Based on code from mm/memory.c Copyright Linus Torvalds and others.
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*
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* Copyright 2011 Red Hat, Inc., Peter Zijlstra
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_GENERIC__TLB_H
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#define _ASM_GENERIC__TLB_H
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#include <linux/mmu_notifier.h>
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#include <linux/swap.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#ifdef CONFIG_HAVE_RCU_TABLE_FREE
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/*
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* Semi RCU freeing of the page directories.
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*
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* This is needed by some architectures to implement software pagetable walkers.
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*
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* gup_fast() and other software pagetable walkers do a lockless page-table
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* walk and therefore needs some synchronization with the freeing of the page
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* directories. The chosen means to accomplish that is by disabling IRQs over
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* the walk.
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*
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* Architectures that use IPIs to flush TLBs will then automagically DTRT,
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* since we unlink the page, flush TLBs, free the page. Since the disabling of
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* IRQs delays the completion of the TLB flush we can never observe an already
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* freed page.
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*
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* Architectures that do not have this (PPC) need to delay the freeing by some
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* other means, this is that means.
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*
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* What we do is batch the freed directory pages (tables) and RCU free them.
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* We use the sched RCU variant, as that guarantees that IRQ/preempt disabling
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* holds off grace periods.
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*
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* However, in order to batch these pages we need to allocate storage, this
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* allocation is deep inside the MM code and can thus easily fail on memory
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* pressure. To guarantee progress we fall back to single table freeing, see
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* the implementation of tlb_remove_table_one().
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*
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*/
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struct mmu_table_batch {
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struct rcu_head rcu;
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unsigned int nr;
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void *tables[0];
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};
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#define MAX_TABLE_BATCH \
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((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
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extern void tlb_table_flush(struct mmu_gather *tlb);
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extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
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#endif
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/*
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* If we can't allocate a page to make a big batch of page pointers
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* to work on, then just handle a few from the on-stack structure.
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*/
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#define MMU_GATHER_BUNDLE 8
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struct mmu_gather_batch {
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struct mmu_gather_batch *next;
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unsigned int nr;
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unsigned int max;
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struct page *pages[0];
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};
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#define MAX_GATHER_BATCH \
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((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
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/*
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* Limit the maximum number of mmu_gather batches to reduce a risk of soft
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* lockups for non-preemptible kernels on huge machines when a lot of memory
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* is zapped during unmapping.
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* 10K pages freed at once should be safe even without a preemption point.
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*/
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#define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH)
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/* struct mmu_gather is an opaque type used by the mm code for passing around
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* any data needed by arch specific code for tlb_remove_page.
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*/
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struct mmu_gather {
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struct mm_struct *mm;
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#ifdef CONFIG_HAVE_RCU_TABLE_FREE
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struct mmu_table_batch *batch;
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#endif
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unsigned long start;
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unsigned long end;
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/* we are in the middle of an operation to clear
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* a full mm and can make some optimizations */
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unsigned int fullmm : 1,
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/* we have performed an operation which
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* requires a complete flush of the tlb */
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need_flush_all : 1;
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struct mmu_gather_batch *active;
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struct mmu_gather_batch local;
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struct page *__pages[MMU_GATHER_BUNDLE];
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unsigned int batch_count;
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int page_size;
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};
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#define HAVE_GENERIC_MMU_GATHER
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void arch_tlb_gather_mmu(struct mmu_gather *tlb,
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struct mm_struct *mm, unsigned long start, unsigned long end);
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void tlb_flush_mmu(struct mmu_gather *tlb);
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void arch_tlb_finish_mmu(struct mmu_gather *tlb,
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unsigned long start, unsigned long end, bool force);
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extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page,
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int page_size);
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static inline void __tlb_adjust_range(struct mmu_gather *tlb,
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unsigned long address,
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unsigned int range_size)
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{
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tlb->start = min(tlb->start, address);
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tlb->end = max(tlb->end, address + range_size);
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}
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static inline void __tlb_reset_range(struct mmu_gather *tlb)
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{
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if (tlb->fullmm) {
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tlb->start = tlb->end = ~0;
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} else {
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tlb->start = TASK_SIZE;
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tlb->end = 0;
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}
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}
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static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
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{
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if (!tlb->end)
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return;
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tlb_flush(tlb);
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mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end);
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__tlb_reset_range(tlb);
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}
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static inline void tlb_remove_page_size(struct mmu_gather *tlb,
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struct page *page, int page_size)
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{
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if (__tlb_remove_page_size(tlb, page, page_size))
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tlb_flush_mmu(tlb);
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}
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static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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return __tlb_remove_page_size(tlb, page, PAGE_SIZE);
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}
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/* tlb_remove_page
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* Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
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* required.
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*/
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static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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return tlb_remove_page_size(tlb, page, PAGE_SIZE);
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}
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#ifndef tlb_remove_check_page_size_change
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#define tlb_remove_check_page_size_change tlb_remove_check_page_size_change
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static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
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unsigned int page_size)
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{
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/*
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* We don't care about page size change, just update
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* mmu_gather page size here so that debug checks
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* doesn't throw false warning.
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*/
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#ifdef CONFIG_DEBUG_VM
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tlb->page_size = page_size;
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#endif
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}
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#endif
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/*
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* In the case of tlb vma handling, we can optimise these away in the
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* case where we're doing a full MM flush. When we're doing a munmap,
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* the vmas are adjusted to only cover the region to be torn down.
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*/
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#ifndef tlb_start_vma
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#define tlb_start_vma(tlb, vma) do { } while (0)
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#endif
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#define __tlb_end_vma(tlb, vma) \
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do { \
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if (!tlb->fullmm) \
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tlb_flush_mmu_tlbonly(tlb); \
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} while (0)
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#ifndef tlb_end_vma
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#define tlb_end_vma __tlb_end_vma
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#endif
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#ifndef __tlb_remove_tlb_entry
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#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
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#endif
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/**
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* tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
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*
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* Record the fact that pte's were really unmapped by updating the range,
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* so we can later optimise away the tlb invalidate. This helps when
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* userspace is unmapping already-unmapped pages, which happens quite a lot.
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*/
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#define tlb_remove_tlb_entry(tlb, ptep, address) \
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do { \
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__tlb_adjust_range(tlb, address, PAGE_SIZE); \
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__tlb_remove_tlb_entry(tlb, ptep, address); \
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} while (0)
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#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
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do { \
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__tlb_adjust_range(tlb, address, huge_page_size(h)); \
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__tlb_remove_tlb_entry(tlb, ptep, address); \
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} while (0)
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/**
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* tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
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* This is a nop so far, because only x86 needs it.
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*/
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#ifndef __tlb_remove_pmd_tlb_entry
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#define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
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#endif
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#define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \
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do { \
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__tlb_adjust_range(tlb, address, HPAGE_PMD_SIZE); \
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__tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
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} while (0)
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/**
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* tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb
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* invalidation. This is a nop so far, because only x86 needs it.
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*/
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#ifndef __tlb_remove_pud_tlb_entry
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#define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0)
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#endif
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#define tlb_remove_pud_tlb_entry(tlb, pudp, address) \
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do { \
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__tlb_adjust_range(tlb, address, HPAGE_PUD_SIZE); \
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__tlb_remove_pud_tlb_entry(tlb, pudp, address); \
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} while (0)
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/*
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* For things like page tables caches (ie caching addresses "inside" the
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* page tables, like x86 does), for legacy reasons, flushing an
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* individual page had better flush the page table caches behind it. This
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* is definitely how x86 works, for example. And if you have an
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* architected non-legacy page table cache (which I'm not aware of
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* anybody actually doing), you're going to have some architecturally
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* explicit flushing for that, likely *separate* from a regular TLB entry
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* flush, and thus you'd need more than just some range expansion..
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*
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* So if we ever find an architecture
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* that would want something that odd, I think it is up to that
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* architecture to do its own odd thing, not cause pain for others
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* http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com
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*
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* For now w.r.t page table cache, mark the range_size as PAGE_SIZE
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*/
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#ifndef pte_free_tlb
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#define pte_free_tlb(tlb, ptep, address) \
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do { \
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__tlb_adjust_range(tlb, address, PAGE_SIZE); \
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__pte_free_tlb(tlb, ptep, address); \
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} while (0)
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#endif
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#ifndef pmd_free_tlb
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#define pmd_free_tlb(tlb, pmdp, address) \
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do { \
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__tlb_adjust_range(tlb, address, PAGE_SIZE); \
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__pmd_free_tlb(tlb, pmdp, address); \
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} while (0)
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#endif
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#ifndef __ARCH_HAS_4LEVEL_HACK
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#ifndef pud_free_tlb
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#define pud_free_tlb(tlb, pudp, address) \
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do { \
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__tlb_adjust_range(tlb, address, PAGE_SIZE); \
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__pud_free_tlb(tlb, pudp, address); \
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} while (0)
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#endif
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#endif
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#ifndef __ARCH_HAS_5LEVEL_HACK
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#ifndef p4d_free_tlb
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#define p4d_free_tlb(tlb, pudp, address) \
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do { \
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__tlb_adjust_range(tlb, address, PAGE_SIZE); \
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__p4d_free_tlb(tlb, pudp, address); \
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} while (0)
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#endif
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#endif
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#define tlb_migrate_finish(mm) do {} while (0)
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#endif /* _ASM_GENERIC__TLB_H */
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