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c031721001
Low level Arch functions were created to support hibernation. swsusp_arch_suspend() relies code from __cpu_suspend_enter() to write cpu state onto the stack, then calling swsusp_save() to save the memory image. Arch specific hibernation header is implemented and is utilized by the arch_hibernation_header_restore() and arch_hibernation_header_save() functions. The arch specific hibernation header consists of satp, hartid, and the cpu_resume address. The kernel built version is also need to be saved into the hibernation image header to making sure only the same kernel is restore when resume. swsusp_arch_resume() creates a temporary page table that covering only the linear map. It copies the restore code to a 'safe' page, then start to restore the memory image. Once completed, it restores the original kernel's page table. It then calls into __hibernate_cpu_resume() to restore the CPU context. Finally, it follows the normal hibernation path back to the hibernation core. To enable hibernation/suspend to disk into RISCV, the below config need to be enabled: - CONFIG_HIBERNATION - CONFIG_ARCH_HIBERNATION_HEADER - CONFIG_ARCH_HIBERNATION_POSSIBLE Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Reviewed-by: Mason Huo <mason.huo@starfivetech.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20230330064321.1008373-5-jeeheng.sia@starfivetech.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
78 lines
1.6 KiB
ArmAsm
78 lines
1.6 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Hibernation low level support for RISCV.
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*
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* Copyright (C) 2023 StarFive Technology Co., Ltd.
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*
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* Author: Jee Heng Sia <jeeheng.sia@starfivetech.com>
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*/
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#include <asm/asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/assembler.h>
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#include <asm/csr.h>
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#include <linux/linkage.h>
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/*
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* int __hibernate_cpu_resume(void)
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* Switch back to the hibernated image's page table prior to restoring the CPU
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* context.
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*
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* Always returns 0
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*/
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ENTRY(__hibernate_cpu_resume)
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/* switch to hibernated image's page table. */
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csrw CSR_SATP, s0
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sfence.vma
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REG_L a0, hibernate_cpu_context
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suspend_restore_csrs
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suspend_restore_regs
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/* Return zero value. */
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mv a0, zero
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ret
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END(__hibernate_cpu_resume)
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/*
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* Prepare to restore the image.
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* a0: satp of saved page tables.
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* a1: satp of temporary page tables.
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* a2: cpu_resume.
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*/
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ENTRY(hibernate_restore_image)
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mv s0, a0
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mv s1, a1
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mv s2, a2
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REG_L s4, restore_pblist
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REG_L a1, relocated_restore_code
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jalr a1
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END(hibernate_restore_image)
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/*
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* The below code will be executed from a 'safe' page.
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* It first switches to the temporary page table, then starts to copy the pages
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* back to the original memory location. Finally, it jumps to __hibernate_cpu_resume()
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* to restore the CPU context.
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*/
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ENTRY(hibernate_core_restore_code)
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/* switch to temp page table. */
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csrw satp, s1
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sfence.vma
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.Lcopy:
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/* The below code will restore the hibernated image. */
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REG_L a1, HIBERN_PBE_ADDR(s4)
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REG_L a0, HIBERN_PBE_ORIG(s4)
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copy_page a0, a1
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REG_L s4, HIBERN_PBE_NEXT(s4)
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bnez s4, .Lcopy
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jalr s2
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END(hibernate_core_restore_code)
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