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The memory model has been updated to provide a stronger ordering guarantee for unlock(A)+lock(B) on the same CPU/thread. Therefore add two litmus tests describing this new guarantee, these tests are simple yet can clearly show the usage of the new guarantee, also they can serve as the self tests for the modification in the model. Co-developed-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
262 lines
9.6 KiB
Plaintext
262 lines
9.6 KiB
Plaintext
============
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LITMUS TESTS
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============
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CoRR+poonceonce+Once.litmus
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Test of read-read coherence, that is, whether or not two
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successive reads from the same variable are ordered.
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CoRW+poonceonce+Once.litmus
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Test of read-write coherence, that is, whether or not a read
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from a given variable followed by a write to that same variable
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are ordered.
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CoWR+poonceonce+Once.litmus
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Test of write-read coherence, that is, whether or not a write
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to a given variable followed by a read from that same variable
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are ordered.
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CoWW+poonceonce.litmus
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Test of write-write coherence, that is, whether or not two
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successive writes to the same variable are ordered.
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IRIW+fencembonceonces+OnceOnce.litmus
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Test of independent reads from independent writes with smp_mb()
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between each pairs of reads. In other words, is smp_mb()
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sufficient to cause two different reading processes to agree on
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the order of a pair of writes, where each write is to a different
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variable by a different process? This litmus test is forbidden
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by LKMM's propagation rule.
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IRIW+poonceonces+OnceOnce.litmus
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Test of independent reads from independent writes with nothing
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between each pairs of reads. In other words, is anything at all
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needed to cause two different reading processes to agree on the
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order of a pair of writes, where each write is to a different
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variable by a different process?
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ISA2+pooncelock+pooncelock+pombonce.litmus
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Tests whether the ordering provided by a lock-protected S
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litmus test is visible to an external process whose accesses are
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separated by smp_mb(). This addition of an external process to
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S is otherwise known as ISA2.
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ISA2+poonceonces.litmus
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As below, but with store-release replaced with WRITE_ONCE()
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and load-acquire replaced with READ_ONCE().
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ISA2+pooncerelease+poacquirerelease+poacquireonce.litmus
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Can a release-acquire chain order a prior store against
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a later load?
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LB+fencembonceonce+ctrlonceonce.litmus
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Does a control dependency and an smp_mb() suffice for the
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load-buffering litmus test, where each process reads from one
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of two variables then writes to the other?
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LB+poacquireonce+pooncerelease.litmus
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Does a release-acquire pair suffice for the load-buffering
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litmus test, where each process reads from one of two variables then
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writes to the other?
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LB+poonceonces.litmus
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As above, but with store-release replaced with WRITE_ONCE()
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and load-acquire replaced with READ_ONCE().
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LB+unlocklockonceonce+poacquireonce.litmus
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Does a unlock+lock pair provides ordering guarantee between a
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load and a store?
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MP+onceassign+derefonce.litmus
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As below, but with rcu_assign_pointer() and an rcu_dereference().
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MP+polockmbonce+poacquiresilsil.litmus
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Protect the access with a lock and an smp_mb__after_spinlock()
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in one process, and use an acquire load followed by a pair of
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spin_is_locked() calls in the other process.
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MP+polockonce+poacquiresilsil.litmus
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Protect the access with a lock in one process, and use an
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acquire load followed by a pair of spin_is_locked() calls
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in the other process.
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MP+polocks.litmus
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As below, but with the second access of the writer process
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and the first access of reader process protected by a lock.
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MP+poonceonces.litmus
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As below, but without the smp_rmb() and smp_wmb().
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MP+pooncerelease+poacquireonce.litmus
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As below, but with a release-acquire chain.
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MP+porevlocks.litmus
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As below, but with the first access of the writer process
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and the second access of reader process protected by a lock.
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MP+unlocklockonceonce+fencermbonceonce.litmus
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Does a unlock+lock pair provides ordering guarantee between a
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store and another store?
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MP+fencewmbonceonce+fencermbonceonce.litmus
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Does a smp_wmb() (between the stores) and an smp_rmb() (between
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the loads) suffice for the message-passing litmus test, where one
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process writes data and then a flag, and the other process reads
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the flag and then the data. (This is similar to the ISA2 tests,
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but with two processes instead of three.)
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R+fencembonceonces.litmus
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This is the fully ordered (via smp_mb()) version of one of
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the classic counterintuitive litmus tests that illustrates the
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effects of store propagation delays.
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R+poonceonces.litmus
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As above, but without the smp_mb() invocations.
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SB+fencembonceonces.litmus
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This is the fully ordered (again, via smp_mb() version of store
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buffering, which forms the core of Dekker's mutual-exclusion
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algorithm.
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SB+poonceonces.litmus
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As above, but without the smp_mb() invocations.
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SB+rfionceonce-poonceonces.litmus
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This litmus test demonstrates that LKMM is not fully multicopy
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atomic. (Neither is it other multicopy atomic.) This litmus test
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also demonstrates the "locations" debugging aid, which designates
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additional registers and locations to be printed out in the dump
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of final states in the herd7 output. Without the "locations"
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statement, only those registers and locations mentioned in the
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"exists" clause will be printed.
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S+poonceonces.litmus
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As below, but without the smp_wmb() and acquire load.
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S+fencewmbonceonce+poacquireonce.litmus
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Can a smp_wmb(), instead of a release, and an acquire order
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a prior store against a subsequent store?
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WRC+poonceonces+Once.litmus
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WRC+pooncerelease+fencermbonceonce+Once.litmus
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These two are members of an extension of the MP litmus-test
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class in which the first write is moved to a separate process.
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The second is forbidden because smp_store_release() is
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A-cumulative in LKMM.
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Z6.0+pooncelock+pooncelock+pombonce.litmus
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Is the ordering provided by a spin_unlock() and a subsequent
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spin_lock() sufficient to make ordering apparent to accesses
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by a process not holding the lock?
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Z6.0+pooncelock+poonceLock+pombonce.litmus
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As above, but with smp_mb__after_spinlock() immediately
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following the spin_lock().
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Z6.0+pooncerelease+poacquirerelease+fencembonceonce.litmus
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Is the ordering provided by a release-acquire chain sufficient
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to make ordering apparent to accesses by a process that does
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not participate in that release-acquire chain?
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A great many more litmus tests are available here:
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https://github.com/paulmckrcu/litmus
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==================
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LITMUS TEST NAMING
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==================
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Litmus tests are usually named based on their contents, which means that
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looking at the name tells you what the litmus test does. The naming
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scheme covers litmus tests having a single cycle that passes through
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each process exactly once, so litmus tests not fitting this description
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are named on an ad-hoc basis.
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The structure of a litmus-test name is the litmus-test class, a plus
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sign ("+"), and one string for each process, separated by plus signs.
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The end of the name is ".litmus".
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The litmus-test classes may be found in the infamous test6.pdf:
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https://www.cl.cam.ac.uk/~pes20/ppc-supplemental/test6.pdf
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Each class defines the pattern of accesses and of the variables accessed.
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For example, if the one process writes to a pair of variables, and
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the other process reads from these same variables, the corresponding
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litmus-test class is "MP" (message passing), which may be found on the
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left-hand end of the second row of tests on page one of test6.pdf.
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The strings used to identify the actions carried out by each process are
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complex due to a desire to have short(er) names. Thus, there is a tool to
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generate these strings from a given litmus test's actions. For example,
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consider the processes from SB+rfionceonce-poonceonces.litmus:
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P0(int *x, int *y)
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{
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int r1;
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int r2;
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WRITE_ONCE(*x, 1);
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r1 = READ_ONCE(*x);
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r2 = READ_ONCE(*y);
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}
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P1(int *x, int *y)
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{
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int r3;
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int r4;
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WRITE_ONCE(*y, 1);
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r3 = READ_ONCE(*y);
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r4 = READ_ONCE(*x);
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}
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The next step is to construct a space-separated list of descriptors,
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interleaving descriptions of the relation between a pair of consecutive
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accesses with descriptions of the second access in the pair.
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P0()'s WRITE_ONCE() is read by its first READ_ONCE(), which is a
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reads-from link (rf) and internal to the P0() process. This is
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"rfi", which is an abbreviation for "reads-from internal". Because
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some of the tools string these abbreviations together with space
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characters separating processes, the first character is capitalized,
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resulting in "Rfi".
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P0()'s second access is a READ_ONCE(), as opposed to (for example)
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smp_load_acquire(), so next is "Once". Thus far, we have "Rfi Once".
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P0()'s third access is also a READ_ONCE(), but to y rather than x.
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This is related to P0()'s second access by program order ("po"),
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to a different variable ("d"), and both accesses are reads ("RR").
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The resulting descriptor is "PodRR". Because P0()'s third access is
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READ_ONCE(), we add another "Once" descriptor.
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A from-read ("fre") relation links P0()'s third to P1()'s first
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access, and the resulting descriptor is "Fre". P1()'s first access is
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WRITE_ONCE(), which as before gives the descriptor "Once". The string
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thus far is thus "Rfi Once PodRR Once Fre Once".
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The remainder of P1() is similar to P0(), which means we add
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"Rfi Once PodRR Once". Another fre links P1()'s last access to
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P0()'s first access, which is WRITE_ONCE(), so we add "Fre Once".
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The full string is thus:
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Rfi Once PodRR Once Fre Once Rfi Once PodRR Once Fre Once
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This string can be given to the "norm7" and "classify7" tools to
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produce the name:
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$ norm7 -bell linux-kernel.bell \
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Rfi Once PodRR Once Fre Once Rfi Once PodRR Once Fre Once | \
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sed -e 's/:.*//g'
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SB+rfionceonce-poonceonces
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Adding the ".litmus" suffix: SB+rfionceonce-poonceonces.litmus
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The descriptors that describe connections between consecutive accesses
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within the cycle through a given litmus test can be provided by the herd7
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tool (Rfi, Po, Fre, and so on) or by the linux-kernel.bell file (Once,
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Release, Acquire, and so on).
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To see the full list of descriptors, execute the following command:
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$ diyone7 -bell linux-kernel.bell -show edges
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