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7b1dde0331
Fix a long standing memory leak of stream buffers for streams that did not have a struct video_device allocated: namely the TS and IDX streams. Signed-off-by: Andy Walls <awalls@radix.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
444 lines
12 KiB
C
444 lines
12 KiB
C
/*
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* cx18 buffer queues
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*
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* Derived from ivtv-queue.c
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*
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* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
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* Copyright (C) 2008 Andy Walls <awalls@radix.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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* 02111-1307 USA
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*/
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#include "cx18-driver.h"
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#include "cx18-queue.h"
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#include "cx18-streams.h"
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#include "cx18-scb.h"
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#include "cx18-io.h"
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void cx18_buf_swap(struct cx18_buffer *buf)
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{
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int i;
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for (i = 0; i < buf->bytesused; i += 4)
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swab32s((u32 *)(buf->buf + i));
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}
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void _cx18_mdl_swap(struct cx18_mdl *mdl)
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{
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struct cx18_buffer *buf;
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list_for_each_entry(buf, &mdl->buf_list, list) {
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if (buf->bytesused == 0)
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break;
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cx18_buf_swap(buf);
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}
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}
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void cx18_queue_init(struct cx18_queue *q)
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{
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INIT_LIST_HEAD(&q->list);
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atomic_set(&q->depth, 0);
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q->bytesused = 0;
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}
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struct cx18_queue *_cx18_enqueue(struct cx18_stream *s, struct cx18_mdl *mdl,
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struct cx18_queue *q, int to_front)
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{
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/* clear the mdl if it is not to be enqueued to the full queue */
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if (q != &s->q_full) {
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mdl->bytesused = 0;
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mdl->readpos = 0;
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mdl->m_flags = 0;
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mdl->skipped = 0;
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mdl->curr_buf = NULL;
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}
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/* q_busy is restricted to a max buffer count imposed by firmware */
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if (q == &s->q_busy &&
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atomic_read(&q->depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
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q = &s->q_free;
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spin_lock(&q->lock);
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if (to_front)
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list_add(&mdl->list, &q->list); /* LIFO */
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else
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list_add_tail(&mdl->list, &q->list); /* FIFO */
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q->bytesused += mdl->bytesused - mdl->readpos;
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atomic_inc(&q->depth);
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spin_unlock(&q->lock);
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return q;
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}
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struct cx18_mdl *cx18_dequeue(struct cx18_stream *s, struct cx18_queue *q)
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{
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struct cx18_mdl *mdl = NULL;
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spin_lock(&q->lock);
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if (!list_empty(&q->list)) {
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mdl = list_first_entry(&q->list, struct cx18_mdl, list);
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list_del_init(&mdl->list);
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q->bytesused -= mdl->bytesused - mdl->readpos;
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mdl->skipped = 0;
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atomic_dec(&q->depth);
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}
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spin_unlock(&q->lock);
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return mdl;
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}
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static void _cx18_mdl_update_bufs_for_cpu(struct cx18_stream *s,
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struct cx18_mdl *mdl)
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{
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struct cx18_buffer *buf;
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u32 buf_size = s->buf_size;
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u32 bytesused = mdl->bytesused;
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list_for_each_entry(buf, &mdl->buf_list, list) {
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buf->readpos = 0;
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if (bytesused >= buf_size) {
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buf->bytesused = buf_size;
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bytesused -= buf_size;
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} else {
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buf->bytesused = bytesused;
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bytesused = 0;
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}
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cx18_buf_sync_for_cpu(s, buf);
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}
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}
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static inline void cx18_mdl_update_bufs_for_cpu(struct cx18_stream *s,
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struct cx18_mdl *mdl)
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{
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struct cx18_buffer *buf;
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if (list_is_singular(&mdl->buf_list)) {
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buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,
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list);
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buf->bytesused = mdl->bytesused;
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buf->readpos = 0;
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cx18_buf_sync_for_cpu(s, buf);
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} else {
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_cx18_mdl_update_bufs_for_cpu(s, mdl);
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}
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}
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struct cx18_mdl *cx18_queue_get_mdl(struct cx18_stream *s, u32 id,
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u32 bytesused)
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{
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struct cx18 *cx = s->cx;
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struct cx18_mdl *mdl;
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struct cx18_mdl *tmp;
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struct cx18_mdl *ret = NULL;
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LIST_HEAD(sweep_up);
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/*
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* We don't have to acquire multiple q locks here, because we are
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* serialized by the single threaded work handler.
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* MDLs from the firmware will thus remain in order as
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* they are moved from q_busy to q_full or to the dvb ring buffer.
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*/
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spin_lock(&s->q_busy.lock);
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list_for_each_entry_safe(mdl, tmp, &s->q_busy.list, list) {
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/*
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* We should find what the firmware told us is done,
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* right at the front of the queue. If we don't, we likely have
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* missed an mdl done message from the firmware.
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* Once we skip an mdl repeatedly, relative to the size of
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* q_busy, we have high confidence we've missed it.
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*/
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if (mdl->id != id) {
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mdl->skipped++;
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if (mdl->skipped >= atomic_read(&s->q_busy.depth)-1) {
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/* mdl must have fallen out of rotation */
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CX18_WARN("Skipped %s, MDL %d, %d "
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"times - it must have dropped out of "
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"rotation\n", s->name, mdl->id,
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mdl->skipped);
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/* Sweep it up to put it back into rotation */
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list_move_tail(&mdl->list, &sweep_up);
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atomic_dec(&s->q_busy.depth);
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}
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continue;
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}
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/*
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* We pull the desired mdl off of the queue here. Something
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* will have to put it back on a queue later.
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*/
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list_del_init(&mdl->list);
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atomic_dec(&s->q_busy.depth);
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ret = mdl;
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break;
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}
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spin_unlock(&s->q_busy.lock);
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/*
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* We found the mdl for which we were looking. Get it ready for
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* the caller to put on q_full or in the dvb ring buffer.
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*/
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if (ret != NULL) {
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ret->bytesused = bytesused;
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ret->skipped = 0;
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/* 0'ed readpos, m_flags & curr_buf when mdl went on q_busy */
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cx18_mdl_update_bufs_for_cpu(s, ret);
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if (s->type != CX18_ENC_STREAM_TYPE_TS)
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set_bit(CX18_F_M_NEED_SWAP, &ret->m_flags);
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}
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/* Put any mdls the firmware is ignoring back into normal rotation */
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list_for_each_entry_safe(mdl, tmp, &sweep_up, list) {
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list_del_init(&mdl->list);
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cx18_enqueue(s, mdl, &s->q_free);
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}
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return ret;
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}
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/* Move all mdls of a queue, while flushing the mdl */
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static void cx18_queue_flush(struct cx18_stream *s,
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struct cx18_queue *q_src, struct cx18_queue *q_dst)
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{
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struct cx18_mdl *mdl;
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/* It only makes sense to flush to q_free or q_idle */
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if (q_src == q_dst || q_dst == &s->q_full || q_dst == &s->q_busy)
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return;
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spin_lock(&q_src->lock);
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spin_lock(&q_dst->lock);
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while (!list_empty(&q_src->list)) {
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mdl = list_first_entry(&q_src->list, struct cx18_mdl, list);
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list_move_tail(&mdl->list, &q_dst->list);
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mdl->bytesused = 0;
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mdl->readpos = 0;
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mdl->m_flags = 0;
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mdl->skipped = 0;
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mdl->curr_buf = NULL;
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atomic_inc(&q_dst->depth);
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}
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cx18_queue_init(q_src);
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spin_unlock(&q_src->lock);
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spin_unlock(&q_dst->lock);
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}
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void cx18_flush_queues(struct cx18_stream *s)
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{
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cx18_queue_flush(s, &s->q_busy, &s->q_free);
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cx18_queue_flush(s, &s->q_full, &s->q_free);
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}
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/*
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* Note, s->buf_pool is not protected by a lock,
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* the stream better not have *anything* going on when calling this
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*/
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void cx18_unload_queues(struct cx18_stream *s)
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{
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struct cx18_queue *q_idle = &s->q_idle;
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struct cx18_mdl *mdl;
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struct cx18_buffer *buf;
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/* Move all MDLS to q_idle */
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cx18_queue_flush(s, &s->q_busy, q_idle);
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cx18_queue_flush(s, &s->q_full, q_idle);
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cx18_queue_flush(s, &s->q_free, q_idle);
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/* Reset MDL id's and move all buffers back to the stream's buf_pool */
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spin_lock(&q_idle->lock);
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list_for_each_entry(mdl, &q_idle->list, list) {
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while (!list_empty(&mdl->buf_list)) {
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buf = list_first_entry(&mdl->buf_list,
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struct cx18_buffer, list);
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list_move_tail(&buf->list, &s->buf_pool);
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buf->bytesused = 0;
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buf->readpos = 0;
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}
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mdl->id = s->mdl_base_idx; /* reset id to a "safe" value */
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/* all other mdl fields were cleared by cx18_queue_flush() */
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}
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spin_unlock(&q_idle->lock);
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}
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/*
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* Note, s->buf_pool is not protected by a lock,
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* the stream better not have *anything* going on when calling this
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*/
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void cx18_load_queues(struct cx18_stream *s)
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{
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struct cx18 *cx = s->cx;
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struct cx18_mdl *mdl;
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struct cx18_buffer *buf;
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int mdl_id;
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int i;
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u32 partial_buf_size;
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/*
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* Attach buffers to MDLs, give the MDLs ids, and add MDLs to q_free
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* Excess MDLs are left on q_idle
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* Excess buffers are left in buf_pool and/or on an MDL in q_idle
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*/
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mdl_id = s->mdl_base_idx;
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for (mdl = cx18_dequeue(s, &s->q_idle), i = s->bufs_per_mdl;
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mdl != NULL && i == s->bufs_per_mdl;
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mdl = cx18_dequeue(s, &s->q_idle)) {
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mdl->id = mdl_id;
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for (i = 0; i < s->bufs_per_mdl; i++) {
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if (list_empty(&s->buf_pool))
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break;
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buf = list_first_entry(&s->buf_pool, struct cx18_buffer,
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list);
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list_move_tail(&buf->list, &mdl->buf_list);
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/* update the firmware's MDL array with this buffer */
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cx18_writel(cx, buf->dma_handle,
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&cx->scb->cpu_mdl[mdl_id + i].paddr);
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cx18_writel(cx, s->buf_size,
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&cx->scb->cpu_mdl[mdl_id + i].length);
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}
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if (i == s->bufs_per_mdl) {
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/*
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* The encoder doesn't honor s->mdl_size. So in the
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* case of a non-integral number of buffers to meet
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* mdl_size, we lie about the size of the last buffer
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* in the MDL to get the encoder to really only send
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* us mdl_size bytes per MDL transfer.
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*/
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partial_buf_size = s->mdl_size % s->buf_size;
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if (partial_buf_size) {
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cx18_writel(cx, partial_buf_size,
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&cx->scb->cpu_mdl[mdl_id + i - 1].length);
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}
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cx18_enqueue(s, mdl, &s->q_free);
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} else {
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/* Not enough buffers for this MDL; we won't use it */
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cx18_push(s, mdl, &s->q_idle);
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}
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mdl_id += i;
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}
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}
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void _cx18_mdl_sync_for_device(struct cx18_stream *s, struct cx18_mdl *mdl)
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{
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int dma = s->dma;
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u32 buf_size = s->buf_size;
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struct pci_dev *pci_dev = s->cx->pci_dev;
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struct cx18_buffer *buf;
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list_for_each_entry(buf, &mdl->buf_list, list)
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pci_dma_sync_single_for_device(pci_dev, buf->dma_handle,
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buf_size, dma);
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}
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int cx18_stream_alloc(struct cx18_stream *s)
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{
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struct cx18 *cx = s->cx;
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int i;
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if (s->buffers == 0)
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return 0;
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CX18_DEBUG_INFO("Allocate %s stream: %d x %d buffers "
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"(%d.%02d kB total)\n",
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s->name, s->buffers, s->buf_size,
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s->buffers * s->buf_size / 1024,
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(s->buffers * s->buf_size * 100 / 1024) % 100);
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if (((char __iomem *)&cx->scb->cpu_mdl[cx->free_mdl_idx + s->buffers] -
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(char __iomem *)cx->scb) > SCB_RESERVED_SIZE) {
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unsigned bufsz = (((char __iomem *)cx->scb) + SCB_RESERVED_SIZE -
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((char __iomem *)cx->scb->cpu_mdl));
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CX18_ERR("Too many buffers, cannot fit in SCB area\n");
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CX18_ERR("Max buffers = %zd\n",
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bufsz / sizeof(struct cx18_mdl_ent));
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return -ENOMEM;
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}
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s->mdl_base_idx = cx->free_mdl_idx;
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/* allocate stream buffers and MDLs */
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for (i = 0; i < s->buffers; i++) {
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struct cx18_mdl *mdl;
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struct cx18_buffer *buf;
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/* 1 MDL per buffer to handle the worst & also default case */
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mdl = kzalloc(sizeof(struct cx18_mdl), GFP_KERNEL|__GFP_NOWARN);
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if (mdl == NULL)
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break;
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buf = kzalloc(sizeof(struct cx18_buffer),
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GFP_KERNEL|__GFP_NOWARN);
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if (buf == NULL) {
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kfree(mdl);
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break;
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}
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buf->buf = kmalloc(s->buf_size, GFP_KERNEL|__GFP_NOWARN);
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if (buf->buf == NULL) {
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kfree(mdl);
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kfree(buf);
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break;
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}
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INIT_LIST_HEAD(&mdl->list);
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INIT_LIST_HEAD(&mdl->buf_list);
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mdl->id = s->mdl_base_idx; /* a somewhat safe value */
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cx18_enqueue(s, mdl, &s->q_idle);
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INIT_LIST_HEAD(&buf->list);
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buf->dma_handle = pci_map_single(s->cx->pci_dev,
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buf->buf, s->buf_size, s->dma);
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cx18_buf_sync_for_cpu(s, buf);
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list_add_tail(&buf->list, &s->buf_pool);
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}
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if (i == s->buffers) {
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cx->free_mdl_idx += s->buffers;
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return 0;
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}
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CX18_ERR("Couldn't allocate buffers for %s stream\n", s->name);
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cx18_stream_free(s);
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return -ENOMEM;
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}
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void cx18_stream_free(struct cx18_stream *s)
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{
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struct cx18_mdl *mdl;
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struct cx18_buffer *buf;
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struct cx18 *cx = s->cx;
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CX18_DEBUG_INFO("Deallocating buffers for %s stream\n", s->name);
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/* move all buffers to buf_pool and all MDLs to q_idle */
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cx18_unload_queues(s);
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/* empty q_idle */
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while ((mdl = cx18_dequeue(s, &s->q_idle)))
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kfree(mdl);
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/* empty buf_pool */
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while (!list_empty(&s->buf_pool)) {
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buf = list_first_entry(&s->buf_pool, struct cx18_buffer, list);
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list_del_init(&buf->list);
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pci_unmap_single(s->cx->pci_dev, buf->dma_handle,
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s->buf_size, s->dma);
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kfree(buf->buf);
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kfree(buf);
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}
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}
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