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The architecture specification says (for 64-bit systems): PDC is a per processor resource, and operating system software must be prepared to manage separate pointers to PDCE_PROC for each processor. The address of PDCE_PROC for the monarch processor is stored in the Page Zero location MEM_PDC. The address of PDCE_PROC for each non-monarch processor is passed in gr26 when PDCE_RESET invokes OS_RENDEZ. Currently we still use one PDC for all CPUs, but in case we face a machine which is following the specification let's warn about it. Signed-off-by: Helge Deller <deller@gmx.de>
432 lines
9.5 KiB
C
432 lines
9.5 KiB
C
/*
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** SMP Support
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**
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** Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
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** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
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** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org>
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**
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** Lots of stuff stolen from arch/alpha/kernel/smp.c
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** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^)
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**
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** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work.
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** -grant (1/12/2001)
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**
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** This program is free software; you can redistribute it and/or modify
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** it under the terms of the GNU General Public License as published by
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** the Free Software Foundation; either version 2 of the License, or
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** (at your option) any later version.
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*/
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched/mm.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/smp.h>
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#include <linux/kernel_stat.h>
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#include <linux/mm.h>
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/bitops.h>
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#include <linux/ftrace.h>
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#include <linux/cpu.h>
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#include <linux/atomic.h>
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#include <asm/current.h>
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#include <asm/delay.h>
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#include <asm/tlbflush.h>
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#include <asm/io.h>
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#include <asm/irq.h> /* for CPU_IRQ_REGION and friends */
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#include <asm/mmu_context.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/processor.h>
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#include <asm/ptrace.h>
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#include <asm/unistd.h>
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#include <asm/cacheflush.h>
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#undef DEBUG_SMP
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#ifdef DEBUG_SMP
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static int smp_debug_lvl = 0;
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#define smp_debug(lvl, printargs...) \
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if (lvl >= smp_debug_lvl) \
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printk(printargs);
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#else
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#define smp_debug(lvl, ...) do { } while(0)
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#endif /* DEBUG_SMP */
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volatile struct task_struct *smp_init_current_idle_task;
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/* track which CPU is booting */
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static volatile int cpu_now_booting;
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static int parisc_max_cpus = 1;
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static DEFINE_PER_CPU(spinlock_t, ipi_lock);
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enum ipi_message_type {
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IPI_NOP=0,
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IPI_RESCHEDULE=1,
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IPI_CALL_FUNC,
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IPI_CPU_START,
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IPI_CPU_STOP,
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IPI_CPU_TEST
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};
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/********** SMP inter processor interrupt and communication routines */
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#undef PER_CPU_IRQ_REGION
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#ifdef PER_CPU_IRQ_REGION
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/* XXX REVISIT Ignore for now.
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** *May* need this "hook" to register IPI handler
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** once we have perCPU ExtIntr switch tables.
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*/
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static void
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ipi_init(int cpuid)
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{
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#error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region
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if(cpu_online(cpuid) )
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{
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switch_to_idle_task(current);
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}
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return;
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}
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#endif
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/*
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** Yoink this CPU from the runnable list...
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**
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*/
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static void
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halt_processor(void)
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{
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/* REVISIT : redirect I/O Interrupts to another CPU? */
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/* REVISIT : does PM *know* this CPU isn't available? */
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set_cpu_online(smp_processor_id(), false);
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local_irq_disable();
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for (;;)
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;
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}
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irqreturn_t __irq_entry
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ipi_interrupt(int irq, void *dev_id)
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{
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int this_cpu = smp_processor_id();
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struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu);
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unsigned long ops;
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unsigned long flags;
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for (;;) {
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spinlock_t *lock = &per_cpu(ipi_lock, this_cpu);
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spin_lock_irqsave(lock, flags);
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ops = p->pending_ipi;
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p->pending_ipi = 0;
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spin_unlock_irqrestore(lock, flags);
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mb(); /* Order bit clearing and data access. */
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if (!ops)
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break;
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while (ops) {
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unsigned long which = ffz(~ops);
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ops &= ~(1 << which);
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switch (which) {
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case IPI_NOP:
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smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu);
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break;
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case IPI_RESCHEDULE:
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smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu);
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inc_irq_stat(irq_resched_count);
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scheduler_ipi();
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break;
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case IPI_CALL_FUNC:
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smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu);
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generic_smp_call_function_interrupt();
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break;
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case IPI_CPU_START:
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smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu);
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break;
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case IPI_CPU_STOP:
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smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu);
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halt_processor();
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break;
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case IPI_CPU_TEST:
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smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu);
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break;
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default:
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printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n",
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this_cpu, which);
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return IRQ_NONE;
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} /* Switch */
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/* let in any pending interrupts */
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local_irq_enable();
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local_irq_disable();
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} /* while (ops) */
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}
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return IRQ_HANDLED;
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}
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static inline void
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ipi_send(int cpu, enum ipi_message_type op)
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{
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struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu);
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spinlock_t *lock = &per_cpu(ipi_lock, cpu);
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unsigned long flags;
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spin_lock_irqsave(lock, flags);
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p->pending_ipi |= 1 << op;
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gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa);
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spin_unlock_irqrestore(lock, flags);
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}
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static void
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send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op)
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{
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int cpu;
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for_each_cpu(cpu, mask)
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ipi_send(cpu, op);
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}
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static inline void
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send_IPI_single(int dest_cpu, enum ipi_message_type op)
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{
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BUG_ON(dest_cpu == NO_PROC_ID);
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ipi_send(dest_cpu, op);
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}
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static inline void
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send_IPI_allbutself(enum ipi_message_type op)
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{
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int i;
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for_each_online_cpu(i) {
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if (i != smp_processor_id())
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send_IPI_single(i, op);
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}
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}
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inline void
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smp_send_stop(void) { send_IPI_allbutself(IPI_CPU_STOP); }
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void
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smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); }
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void
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smp_send_all_nop(void)
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{
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send_IPI_allbutself(IPI_NOP);
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}
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void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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send_IPI_mask(mask, IPI_CALL_FUNC);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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send_IPI_single(cpu, IPI_CALL_FUNC);
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}
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/*
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* Called by secondaries to update state and initialize CPU registers.
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*/
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static void __init
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smp_cpu_init(int cpunum)
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{
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extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */
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extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */
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/* Set modes and Enable floating point coprocessor */
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init_per_cpu(cpunum);
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disable_sr_hashing();
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mb();
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/* Well, support 2.4 linux scheme as well. */
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if (cpu_online(cpunum)) {
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extern void machine_halt(void); /* arch/parisc.../process.c */
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printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
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machine_halt();
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}
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notify_cpu_starting(cpunum);
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set_cpu_online(cpunum, true);
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/* Initialise the idle task for this CPU */
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mmgrab(&init_mm);
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current->active_mm = &init_mm;
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BUG_ON(current->mm);
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enter_lazy_tlb(&init_mm, current);
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init_IRQ(); /* make sure no IRQs are enabled or pending */
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start_cpu_itimer();
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}
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/*
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* Slaves start using C here. Indirectly called from smp_slave_stext.
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* Do what start_kernel() and main() do for boot strap processor (aka monarch)
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*/
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void __init smp_callin(unsigned long pdce_proc)
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{
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int slave_id = cpu_now_booting;
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#ifdef CONFIG_64BIT
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WARN_ON(((unsigned long)(PAGE0->mem_pdc_hi) << 32
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| PAGE0->mem_pdc) != pdce_proc);
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#endif
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smp_cpu_init(slave_id);
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preempt_disable();
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flush_cache_all_local(); /* start with known state */
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flush_tlb_all_local(NULL);
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local_irq_enable(); /* Interrupts have been off until now */
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cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
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/* NOTREACHED */
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panic("smp_callin() AAAAaaaaahhhh....\n");
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}
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/*
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* Bring one cpu online.
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*/
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int smp_boot_one_cpu(int cpuid, struct task_struct *idle)
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{
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const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid);
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long timeout;
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task_thread_info(idle)->cpu = cpuid;
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/* Let _start know what logical CPU we're booting
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** (offset into init_tasks[],cpu_data[])
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*/
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cpu_now_booting = cpuid;
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/*
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** boot strap code needs to know the task address since
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** it also contains the process stack.
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*/
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smp_init_current_idle_task = idle ;
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mb();
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printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa);
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/*
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** This gets PDC to release the CPU from a very tight loop.
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**
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** From the PA-RISC 2.0 Firmware Architecture Reference Specification:
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** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which
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** is executed after receiving the rendezvous signal (an interrupt to
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** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the
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** contents of memory are valid."
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*/
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gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa);
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mb();
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/*
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* OK, wait a bit for that CPU to finish staggering about.
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* Slave will set a bit when it reaches smp_cpu_init().
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* Once the "monarch CPU" sees the bit change, it can move on.
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*/
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for (timeout = 0; timeout < 10000; timeout++) {
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if(cpu_online(cpuid)) {
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/* Which implies Slave has started up */
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cpu_now_booting = 0;
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smp_init_current_idle_task = NULL;
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goto alive ;
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}
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udelay(100);
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barrier();
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}
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printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
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return -1;
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alive:
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/* Remember the Slave data */
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smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n",
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cpuid, timeout * 100);
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return 0;
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}
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void __init smp_prepare_boot_cpu(void)
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{
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int bootstrap_processor = per_cpu(cpu_data, 0).cpuid;
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/* Setup BSP mappings */
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printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor);
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set_cpu_online(bootstrap_processor, true);
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set_cpu_present(bootstrap_processor, true);
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}
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/*
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** inventory.c:do_inventory() hasn't yet been run and thus we
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** don't 'discover' the additional CPUs until later.
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*/
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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int cpu;
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for_each_possible_cpu(cpu)
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spin_lock_init(&per_cpu(ipi_lock, cpu));
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init_cpu_present(cpumask_of(0));
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parisc_max_cpus = max_cpus;
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if (!max_cpus)
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printk(KERN_INFO "SMP mode deactivated.\n");
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}
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void smp_cpus_done(unsigned int cpu_max)
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{
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return;
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}
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int __cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
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if (cpu != 0 && cpu < parisc_max_cpus && smp_boot_one_cpu(cpu, tidle))
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return -ENOSYS;
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return cpu_online(cpu) ? 0 : -ENOSYS;
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}
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#ifdef CONFIG_PROC_FS
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int __init
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setup_profiling_timer(unsigned int multiplier)
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{
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return -EINVAL;
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}
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#endif
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