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The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
This removes all the ARM uses of the __cpuinit macros from C code,
and all __CPUINIT from assembly code. It also had two ".previous"
section statements that were paired off against __CPUINIT
(aka .section ".cpuinit.text") that also get removed here.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
137 lines
3.5 KiB
C
137 lines
3.5 KiB
C
/*
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* This file contains Xilinx specific SMP code, used to start up
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* the second processor.
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*
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* Copyright (C) 2011-2013 Xilinx
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*
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* based on linux/arch/arm/mach-realview/platsmp.c
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*
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* Copyright (C) 2002 ARM Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/export.h>
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#include <linux/jiffies.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_scu.h>
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#include <linux/irqchip/arm-gic.h>
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#include "common.h"
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/*
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* Store number of cores in the system
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* Because of scu_get_core_count() must be in __init section and can't
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* be called from zynq_cpun_start() because it is not in __init section.
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*/
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static int ncores;
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int zynq_cpun_start(u32 address, int cpu)
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{
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u32 trampoline_code_size = &zynq_secondary_trampoline_end -
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&zynq_secondary_trampoline;
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if (cpu > ncores) {
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pr_warn("CPU No. is not available in the system\n");
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return -1;
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}
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/* MS: Expectation that SLCR are directly map and accessible */
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/* Not possible to jump to non aligned address */
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if (!(address & 3) && (!address || (address >= trampoline_code_size))) {
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/* Store pointer to ioremap area which points to address 0x0 */
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static u8 __iomem *zero;
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u32 trampoline_size = &zynq_secondary_trampoline_jump -
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&zynq_secondary_trampoline;
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zynq_slcr_cpu_stop(cpu);
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if (address) {
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if (__pa(PAGE_OFFSET)) {
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zero = ioremap(0, trampoline_code_size);
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if (!zero) {
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pr_warn("BOOTUP jump vectors not accessible\n");
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return -1;
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}
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} else {
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zero = (__force u8 __iomem *)PAGE_OFFSET;
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}
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/*
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* This is elegant way how to jump to any address
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* 0x0: Load address at 0x8 to r0
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* 0x4: Jump by mov instruction
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* 0x8: Jumping address
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*/
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memcpy((__force void *)zero, &zynq_secondary_trampoline,
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trampoline_size);
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writel(address, zero + trampoline_size);
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flush_cache_all();
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outer_flush_range(0, trampoline_code_size);
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smp_wmb();
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if (__pa(PAGE_OFFSET))
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iounmap(zero);
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}
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zynq_slcr_cpu_start(cpu);
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return 0;
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}
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pr_warn("Can't start CPU%d: Wrong starting address %x\n", cpu, address);
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return -1;
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}
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EXPORT_SYMBOL(zynq_cpun_start);
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static int zynq_boot_secondary(unsigned int cpu,
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struct task_struct *idle)
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{
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return zynq_cpun_start(virt_to_phys(secondary_startup), cpu);
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}
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/*
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* Initialise the CPU possible map early - this describes the CPUs
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* which may be present or become present in the system.
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*/
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static void __init zynq_smp_init_cpus(void)
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{
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int i;
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ncores = scu_get_core_count(zynq_scu_base);
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for (i = 0; i < ncores && i < CONFIG_NR_CPUS; i++)
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set_cpu_possible(i, true);
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}
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static void __init zynq_smp_prepare_cpus(unsigned int max_cpus)
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{
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int i;
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/*
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* Initialise the present map, which describes the set of CPUs
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* actually populated at the present time.
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*/
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for (i = 0; i < max_cpus; i++)
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set_cpu_present(i, true);
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scu_enable(zynq_scu_base);
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}
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struct smp_operations zynq_smp_ops __initdata = {
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.smp_init_cpus = zynq_smp_init_cpus,
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.smp_prepare_cpus = zynq_smp_prepare_cpus,
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.smp_boot_secondary = zynq_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = zynq_platform_cpu_die,
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#endif
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};
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