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7ced5eab39
Add the GPIO banks that are used on the S3C2443 and above to the list of available GPIOS. Currently we do not have any limit on the SoC GPIO, so these are being registered whether the SoC has them or not. It is currently up to the user not to try and use them. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
106 lines
3.5 KiB
C
106 lines
3.5 KiB
C
/* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
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*
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* Copyright (c) 2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - GPIO bank numbering
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __MACH_GPIONRS_H
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#define __MACH_GPIONRS_H
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#define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
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#define S3C2410_GPIO_BANKA (32*0)
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#define S3C2410_GPIO_BANKB (32*1)
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#define S3C2410_GPIO_BANKC (32*2)
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#define S3C2410_GPIO_BANKD (32*3)
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#define S3C2410_GPIO_BANKE (32*4)
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#define S3C2410_GPIO_BANKF (32*5)
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#define S3C2410_GPIO_BANKG (32*6)
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#define S3C2410_GPIO_BANKH (32*7)
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/* GPIO bank sizes */
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#define S3C2410_GPIO_A_NR (32)
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#define S3C2410_GPIO_B_NR (32)
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#define S3C2410_GPIO_C_NR (32)
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#define S3C2410_GPIO_D_NR (32)
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#define S3C2410_GPIO_E_NR (32)
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#define S3C2410_GPIO_F_NR (32)
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#define S3C2410_GPIO_G_NR (32)
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#define S3C2410_GPIO_H_NR (32)
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#define S3C2410_GPIO_J_NR (32) /* technically 16. */
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#define S3C2410_GPIO_K_NR (32) /* technically 16. */
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#define S3C2410_GPIO_L_NR (32) /* technically 15. */
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#define S3C2410_GPIO_M_NR (32) /* technically 2. */
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#if CONFIG_S3C_GPIO_SPACE != 0
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#error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment
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#endif
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#define S3C2410_GPIO_NEXT(__gpio) \
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((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
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#ifndef __ASSEMBLY__
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enum s3c_gpio_number {
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S3C2410_GPIO_A_START = 0,
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S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
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S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
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S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
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S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
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S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
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S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
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S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
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S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
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S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
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S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
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S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
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};
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#endif /* __ASSEMBLY__ */
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/* S3C2410 GPIO number definitions. */
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#define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr))
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#define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr))
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#define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr))
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#define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr))
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#define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr))
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#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
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#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
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#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
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#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
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#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
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#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
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#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
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/* compatibility until drivers can be modified */
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#define S3C2410_GPA0 S3C2410_GPA(0)
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#define S3C2410_GPA1 S3C2410_GPA(1)
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#define S3C2410_GPA3 S3C2410_GPA(3)
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#define S3C2410_GPA7 S3C2410_GPA(7)
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#define S3C2410_GPE0 S3C2410_GPE(0)
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#define S3C2410_GPE1 S3C2410_GPE(1)
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#define S3C2410_GPE2 S3C2410_GPE(2)
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#define S3C2410_GPE3 S3C2410_GPE(3)
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#define S3C2410_GPE4 S3C2410_GPE(4)
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#define S3C2410_GPE5 S3C2410_GPE(5)
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#define S3C2410_GPE6 S3C2410_GPE(6)
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#define S3C2410_GPE7 S3C2410_GPE(7)
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#define S3C2410_GPE8 S3C2410_GPE(8)
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#define S3C2410_GPE9 S3C2410_GPE(9)
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#define S3C2410_GPE10 S3C2410_GPE(10)
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#define S3C2410_GPH10 S3C2410_GPH(10)
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#endif /* __MACH_GPIONRS_H */
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