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The two device tree files octeon_3xxx.dts and octeon_68xx.dts are trimmed by code in a subsequent patch to reflect the hardware actually present on the board. To this end several properties that are not part of the declared bindings are added to aid in trimming off unwanted nodes. Since the device tree and the code that trims it are bound into the kernel binary, these 'marker' properties never escape into the wild, and are purely an implementation detail of the kernel early boot process. This is done for backwards compatibility with existing boards (identified by a board type enumeration value by their bootloaders). New boards will always pass a device tree from the bootloader, the built-in trees are ignored in this case. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3937/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
28 lines
582 B
Plaintext
28 lines
582 B
Plaintext
* System Management Interface (SMI) / MDIO
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Properties:
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- compatible: "cavium,octeon-3860-mdio"
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Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
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- reg: The base address of the MDIO bus controller register bank.
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- #address-cells: Must be <1>.
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- #size-cells: Must be <0>. MDIO addresses have no size component.
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Typically an MDIO bus might have several children.
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Example:
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mdio@1180000001800 {
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compatible = "cavium,octeon-3860-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x11800 0x00001800 0x0 0x40>;
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ethernet-phy@0 {
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...
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reg = <0>;
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};
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};
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