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cbaa118ecf
Presently most of the 29-bit physical parts do P1/P2 segmentation with a 1:1 cached/uncached mapping, jumping between the two to control the caching behaviour. This provides the basic infrastructure to maintain this behaviour on 32-bit physical parts that don't map P1/P2 at all, using a shiny new linker section and corresponding fixmap entry. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
#ifndef __ASM_SH_SYSTEM_64_H
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#define __ASM_SH_SYSTEM_64_H
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/*
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* include/asm-sh/system_64.h
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 Paul Mundt
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* Copyright (C) 2004 Richard Curnow
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <asm/processor.h>
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/*
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* switch_to() should switch tasks to task nr n, first
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*/
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struct task_struct *sh64_switch_to(struct task_struct *prev,
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struct thread_struct *prev_thread,
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struct task_struct *next,
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struct thread_struct *next_thread);
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#define switch_to(prev,next,last) \
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do { \
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if (last_task_used_math != next) { \
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struct pt_regs *regs = next->thread.uregs; \
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if (regs) regs->sr |= SR_FD; \
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} \
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last = sh64_switch_to(prev, &prev->thread, next, \
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&next->thread); \
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} while (0)
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#define __uses_jump_to_uncached
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#define jump_to_uncached() do { } while (0)
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#define back_to_cached() do { } while (0)
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#endif /* __ASM_SH_SYSTEM_64_H */
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