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b0aa05065a
Second fix for this driver due to different introducing patches.
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: 7f85e42a6c ("iio: imu: inv_icm42600: add buffer support in iio devices")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-79-jic23@kernel.org
99 lines
2.5 KiB
C
99 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2020 Invensense, Inc.
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*/
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#ifndef INV_ICM42600_BUFFER_H_
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#define INV_ICM42600_BUFFER_H_
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#include <linux/kernel.h>
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#include <linux/bits.h>
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struct inv_icm42600_state;
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#define INV_ICM42600_SENSOR_GYRO BIT(0)
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#define INV_ICM42600_SENSOR_ACCEL BIT(1)
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#define INV_ICM42600_SENSOR_TEMP BIT(2)
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/**
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* struct inv_icm42600_fifo - FIFO state variables
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* @on: reference counter for FIFO on.
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* @en: bits field of INV_ICM42600_SENSOR_* for FIFO EN bits.
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* @period: FIFO internal period.
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* @watermark: watermark configuration values for accel and gyro.
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* @count: number of bytes in the FIFO data buffer.
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* @nb: gyro, accel and total samples in the FIFO data buffer.
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* @data: FIFO data buffer aligned for DMA (2kB + 32 bytes of read cache).
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*/
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struct inv_icm42600_fifo {
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unsigned int on;
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unsigned int en;
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uint32_t period;
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struct {
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unsigned int gyro;
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unsigned int accel;
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} watermark;
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size_t count;
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struct {
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size_t gyro;
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size_t accel;
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size_t total;
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} nb;
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uint8_t data[2080] __aligned(IIO_DMA_MINALIGN);
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};
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/* FIFO data packet */
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struct inv_icm42600_fifo_sensor_data {
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__be16 x;
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__be16 y;
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__be16 z;
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} __packed;
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#define INV_ICM42600_FIFO_DATA_INVALID -32768
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static inline int16_t inv_icm42600_fifo_get_sensor_data(__be16 d)
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{
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return be16_to_cpu(d);
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}
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static inline bool
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inv_icm42600_fifo_is_data_valid(const struct inv_icm42600_fifo_sensor_data *s)
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{
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int16_t x, y, z;
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x = inv_icm42600_fifo_get_sensor_data(s->x);
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y = inv_icm42600_fifo_get_sensor_data(s->y);
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z = inv_icm42600_fifo_get_sensor_data(s->z);
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if (x == INV_ICM42600_FIFO_DATA_INVALID &&
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y == INV_ICM42600_FIFO_DATA_INVALID &&
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z == INV_ICM42600_FIFO_DATA_INVALID)
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return false;
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return true;
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}
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ssize_t inv_icm42600_fifo_decode_packet(const void *packet, const void **accel,
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const void **gyro, const int8_t **temp,
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const void **timestamp, unsigned int *odr);
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extern const struct iio_buffer_setup_ops inv_icm42600_buffer_ops;
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int inv_icm42600_buffer_init(struct inv_icm42600_state *st);
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void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st);
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int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st,
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unsigned int fifo_en);
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int inv_icm42600_buffer_update_watermark(struct inv_icm42600_state *st);
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int inv_icm42600_buffer_fifo_read(struct inv_icm42600_state *st,
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unsigned int max);
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int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st);
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int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st,
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unsigned int count);
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#endif
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