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7c3dc440b1
- CXL RAM region enumeration: instantiate 'struct cxl_region' objects
for platform firmware created memory regions
- CXL RAM region provisioning: complement the existing PMEM region
creation support with RAM region support
- "Soft Reservation" policy change: Online (memory hot-add)
soft-reserved memory (EFI_MEMORY_SP) by default, but still allow for
setting aside such memory for dedicated access via device-dax.
- CXL Events and Interrupts: Takeover CXL event handling from
platform-firmware (ACPI calls this CXL Memory Error Reporting) and
export CXL Events via Linux Trace Events.
- Convey CXL _OSC results to drivers: Similar to PCI, let the CXL
subsystem interrogate the result of CXL _OSC negotiation.
- Emulate CXL DVSEC Range Registers as "decoders": Allow for
first-generation devices that pre-date the definition of the CXL HDM
Decoder Capability to translate the CXL DVSEC Range Registers into
'struct cxl_decoder' objects.
- Set timestamp: Per spec, set the device timestamp in case of hotplug,
or if platform-firwmare failed to set it.
- General fixups: linux-next build issues, non-urgent fixes for
pre-production hardware, unit test fixes, spelling and debug message
improvements.
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Merge tag 'cxl-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl
Pull Compute Express Link (CXL) updates from Dan Williams:
"To date Linux has been dependent on platform-firmware to map CXL RAM
regions and handle events / errors from devices. With this update we
can now parse / update the CXL memory layout, and report events /
errors from devices. This is a precursor for the CXL subsystem to
handle the end-to-end "RAS" flow for CXL memory. i.e. the flow that
for DDR-attached-DRAM is handled by the EDAC driver where it maps
system physical address events to a field-replaceable-unit (FRU /
endpoint device). In general, CXL has the potential to standardize
what has historically been a pile of memory-controller-specific error
handling logic.
Another change of note is the default policy for handling RAM-backed
device-dax instances. Previously the default access mode was "device",
mmap(2) a device special file to access memory. The new default is
"kmem" where the address range is assigned to the core-mm via
add_memory_driver_managed(). This saves typical users from wondering
why their platform memory is not visible via free(1) and stuck behind
a device-file. At the same time it allows expert users to deploy
policy to, for example, get dedicated access to high performance
memory, or hide low performance memory from general purpose kernel
allocations. This affects not only CXL, but also systems with
high-bandwidth-memory that platform-firmware tags with the
EFI_MEMORY_SP (special purpose) designation.
Summary:
- CXL RAM region enumeration: instantiate 'struct cxl_region' objects
for platform firmware created memory regions
- CXL RAM region provisioning: complement the existing PMEM region
creation support with RAM region support
- "Soft Reservation" policy change: Online (memory hot-add)
soft-reserved memory (EFI_MEMORY_SP) by default, but still allow
for setting aside such memory for dedicated access via device-dax.
- CXL Events and Interrupts: Takeover CXL event handling from
platform-firmware (ACPI calls this CXL Memory Error Reporting) and
export CXL Events via Linux Trace Events.
- Convey CXL _OSC results to drivers: Similar to PCI, let the CXL
subsystem interrogate the result of CXL _OSC negotiation.
- Emulate CXL DVSEC Range Registers as "decoders": Allow for
first-generation devices that pre-date the definition of the CXL
HDM Decoder Capability to translate the CXL DVSEC Range Registers
into 'struct cxl_decoder' objects.
- Set timestamp: Per spec, set the device timestamp in case of
hotplug, or if platform-firwmare failed to set it.
- General fixups: linux-next build issues, non-urgent fixes for
pre-production hardware, unit test fixes, spelling and debug
message improvements"
* tag 'cxl-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (66 commits)
dax/kmem: Fix leak of memory-hotplug resources
cxl/mem: Add kdoc param for event log driver state
cxl/trace: Add serial number to trace points
cxl/trace: Add host output to trace points
cxl/trace: Standardize device information output
cxl/pci: Remove locked check for dvsec_range_allowed()
cxl/hdm: Add emulation when HDM decoders are not committed
cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decoders
cxl/hdm: Emulate HDM decoder from DVSEC range registers
cxl/pci: Refactor cxl_hdm_decode_init()
cxl/port: Export cxl_dvsec_rr_decode() to cxl_port
cxl/pci: Break out range register decoding from cxl_hdm_decode_init()
cxl: add RAS status unmasking for CXL
cxl: remove unnecessary calling of pci_enable_pcie_error_reporting()
dax/hmem: build hmem device support as module if possible
dax: cxl: add CXL_REGION dependency
cxl: avoid returning uninitialized error code
cxl/pmem: Fix nvdimm registration races
cxl/mem: Fix UAPI command comment
cxl/uapi: Tag commands from cxl_query_cmd()
...
82 lines
2.9 KiB
Plaintext
82 lines
2.9 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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menuconfig DAX
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tristate "DAX: direct access to differentiated memory"
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default m if NVDIMM_DAX
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if DAX
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config DEV_DAX
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tristate "Device DAX: direct access mapping device"
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depends on TRANSPARENT_HUGEPAGE
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help
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Support raw access to differentiated (persistence, bandwidth,
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latency...) memory via an mmap(2) capable character
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device. Platform firmware or a device driver may identify a
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platform memory resource that is differentiated from the
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baseline memory pool. Mappings of a /dev/daxX.Y device impose
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restrictions that make the mapping behavior deterministic.
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config DEV_DAX_PMEM
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tristate "PMEM DAX: direct access to persistent memory"
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depends on LIBNVDIMM && NVDIMM_DAX && DEV_DAX
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default DEV_DAX
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help
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Support raw access to persistent memory. Note that this
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driver consumes memory ranges allocated and exported by the
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libnvdimm sub-system.
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Say M if unsure
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config DEV_DAX_HMEM
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tristate "HMEM DAX: direct access to 'specific purpose' memory"
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depends on EFI_SOFT_RESERVE
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select NUMA_KEEP_MEMINFO if (NUMA && X86)
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default DEV_DAX
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help
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EFI 2.8 platforms, and others, may advertise 'specific purpose'
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memory. For example, a high bandwidth memory pool. The
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indication from platform firmware is meant to reserve the
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memory from typical usage by default. This driver creates
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device-dax instances for these memory ranges, and that also
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enables the possibility to assign them to the DEV_DAX_KMEM
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driver to override the reservation and add them to kernel
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"System RAM" pool.
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Say M if unsure.
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config DEV_DAX_CXL
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tristate "CXL DAX: direct access to CXL RAM regions"
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depends on CXL_BUS && CXL_REGION && DEV_DAX
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default CXL_REGION && DEV_DAX
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help
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CXL RAM regions are either mapped by platform-firmware
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and published in the initial system-memory map as "System RAM", mapped
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by platform-firmware as "Soft Reserved", or dynamically provisioned
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after boot by the CXL driver. In the latter two cases a device-dax
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instance is created to access that unmapped-by-default address range.
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Per usual it can remain as dedicated access via a device interface, or
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converted to "System RAM" via the dax_kmem facility.
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config DEV_DAX_HMEM_DEVICES
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depends on DEV_DAX_HMEM && DAX
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def_bool y
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config DEV_DAX_KMEM
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tristate "KMEM DAX: map dax-devices as System-RAM"
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default DEV_DAX
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depends on DEV_DAX
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depends on MEMORY_HOTPLUG # for add_memory() and friends
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help
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Support access to persistent, or other performance
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differentiated memory as if it were System RAM. This allows
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easier use of persistent memory by unmodified applications, or
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adds core kernel memory services to heterogeneous memory types
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(HMEM) marked "reserved" by platform firmware.
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To use this feature, a DAX device must be unbound from the
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device_dax driver and bound to this kmem driver on each boot.
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Say N if unsure.
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endif
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