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5c91fb902d
/* * CPUs often take a performance hit when accessing unaligned memory * locations. The actual performance hit varies, it can be small if the * hardware handles it or large if we have to take an exception and fix * it * in software. * * Since an ethernet header is 14 bytes network drivers often end up * with * the IP header at an unaligned offset. The IP header can be aligned by * shifting the start of the packet by 2 bytes. Drivers should do this * with: * * skb_reserve(NET_IP_ALIGN); * * The downside to this alignment of the IP header is that the DMA is * now * unaligned. On some architectures the cost of an unaligned DMA is high * and this cost outweighs the gains made by aligning the IP header. * * Since this trade off varies between architectures, we allow * NET_IP_ALIGN * to be overridden. */ This new function insl_16 allows to read form 32-bit IO and writes to 16-bit aligned memory. This is useful in above described scenario - In particular with the AXIS AX88180 Gigabit Ethernet MAC. Once the device is in 32-bit mode, reads from the RX FIFO always decrements 4bytes. While on the other side the destination address in SDRAM is always 16-bit aligned. If we use skb_reserve(0) the receive buffer is 32-bit aligned but later we hit a unaligned exception in the IP code. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
213 lines
5.8 KiB
C
213 lines
5.8 KiB
C
#ifndef _BFIN_IO_H
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#define _BFIN_IO_H
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#endif
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#include <linux/compiler.h>
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/*
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* These are for ISA/PCI shared memory _only_ and should never be used
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* on any other type of memory, including Zorro memory. They are meant to
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* access the bus in the bus byte order which is little-endian!.
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*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the bfin architecture, we just read/write the
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* memory location directly.
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*/
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#ifndef __ASSEMBLY__
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static inline unsigned char readb(const volatile void __iomem *addr)
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{
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unsigned int val;
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int tmp;
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__asm__ __volatile__ ("cli %1;\n\t"
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"NOP; NOP; SSYNC;\n\t"
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"%0 = b [%2] (z);\n\t"
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"sti %1;\n\t"
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: "=d"(val), "=d"(tmp): "a"(addr)
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);
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return (unsigned char) val;
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}
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static inline unsigned short readw(const volatile void __iomem *addr)
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{
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unsigned int val;
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int tmp;
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__asm__ __volatile__ ("cli %1;\n\t"
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"NOP; NOP; SSYNC;\n\t"
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"%0 = w [%2] (z);\n\t"
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"sti %1;\n\t"
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: "=d"(val), "=d"(tmp): "a"(addr)
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);
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return (unsigned short) val;
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}
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static inline unsigned int readl(const volatile void __iomem *addr)
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{
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unsigned int val;
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int tmp;
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__asm__ __volatile__ ("cli %1;\n\t"
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"NOP; NOP; SSYNC;\n\t"
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"%0 = [%2];\n\t"
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"sti %1;\n\t"
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: "=d"(val), "=d"(tmp): "a"(addr)
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);
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return val;
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}
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#endif /* __ASSEMBLY__ */
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#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b))
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#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b))
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#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b))
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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#define memset_io(a,b,c) memset((void *)(a),(b),(c))
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#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
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#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
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#define inb(addr) readb(addr)
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#define inw(addr) readw(addr)
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#define inl(addr) readl(addr)
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#define outb(x,addr) ((void) writeb(x,addr))
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#define outw(x,addr) ((void) writew(x,addr))
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#define outl(x,addr) ((void) writel(x,addr))
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#define inb_p(addr) inb(addr)
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#define inw_p(addr) inw(addr)
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#define inl_p(addr) inl(addr)
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#define outb_p(x,addr) outb(x,addr)
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#define outw_p(x,addr) outw(x,addr)
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#define outl_p(x,addr) outl(x,addr)
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#define ioread8_rep(a,d,c) insb(a,d,c)
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#define ioread16_rep(a,d,c) insw(a,d,c)
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#define ioread32_rep(a,d,c) insl(a,d,c)
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#define iowrite8_rep(a,s,c) outsb(a,s,c)
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#define iowrite16_rep(a,s,c) outsw(a,s,c)
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#define iowrite32_rep(a,s,c) outsl(a,s,c)
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#define ioread8(X) readb(X)
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#define ioread16(X) readw(X)
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#define ioread32(X) readl(X)
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#define iowrite8(val,X) writeb(val,X)
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#define iowrite16(val,X) writew(val,X)
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#define iowrite32(val,X) writel(val,X)
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#define IO_SPACE_LIMIT 0xffffffff
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/* Values for nocacheflag and cmode */
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#define IOMAP_NOCACHE_SER 1
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#ifndef __ASSEMBLY__
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extern void outsb(unsigned long port, const void *addr, unsigned long count);
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extern void outsw(unsigned long port, const void *addr, unsigned long count);
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extern void outsl(unsigned long port, const void *addr, unsigned long count);
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extern void insb(unsigned long port, void *addr, unsigned long count);
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extern void insw(unsigned long port, void *addr, unsigned long count);
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extern void insl(unsigned long port, void *addr, unsigned long count);
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extern void insl_16(unsigned long port, void *addr, unsigned long count);
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extern void dma_outsb(unsigned long port, const void *addr, unsigned short count);
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extern void dma_outsw(unsigned long port, const void *addr, unsigned short count);
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extern void dma_outsl(unsigned long port, const void *addr, unsigned short count);
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extern void dma_insb(unsigned long port, void *addr, unsigned short count);
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extern void dma_insw(unsigned long port, void *addr, unsigned short count);
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extern void dma_insl(unsigned long port, void *addr, unsigned short count);
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/*
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* Map some physical address range into the kernel address space.
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*/
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static inline void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
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int cacheflag)
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{
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return (void __iomem *)physaddr;
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}
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/*
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* Unmap a ioremap()ed region again
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*/
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static inline void iounmap(void *addr)
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{
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}
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/*
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* __iounmap unmaps nearly everything, so be careful
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* it doesn't free currently pointer/page tables anymore but it
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* wans't used anyway and might be added later.
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*/
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static inline void __iounmap(void *addr, unsigned long size)
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{
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}
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/*
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* Set new cache mode for some kernel address space.
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* The caller must push data for that range itself, if such data may already
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* be in the cache.
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*/
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static inline void kernel_set_cachemode(void *addr, unsigned long size,
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int cmode)
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{
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}
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static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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static inline void __iomem *ioremap_nocache(unsigned long physaddr,
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unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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extern void blkfin_inv_cache_all(void);
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#endif
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#define ioport_map(port, nr) ((void __iomem*)(port))
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#define ioport_unmap(addr)
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/* Pages to physical address... */
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#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
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#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT)
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#define mm_ptov(vaddr) ((void *) (vaddr))
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#define mm_vtop(vaddr) ((unsigned long) (vaddr))
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#define phys_to_virt(vaddr) ((void *) (vaddr))
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#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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#endif /* __KERNEL__ */
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#endif /* _BFIN_IO_H */
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