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ARMv6 and greater introduced a new instruction ("bx") which can be used to return from function calls. Recent CPUs perform better when the "bx lr" instruction is used rather than the "mov pc, lr" instruction, and this sequence is strongly recommended to be used by the ARM architecture manual (section A.4.1.1). We provide a new macro "ret" with all its variants for the condition code which will resolve to the appropriate instruction. Rather than doing this piecemeal, and miss some instances, change all the "mov pc" instances to use the new macro, with the exception of the "movs" instruction and the kprobes code. This allows us to detect the "mov pc, lr" case and fix it up - and also gives us the possibility of deploying this for other registers depending on the CPU selection. Reported-by: Will Deacon <will.deacon@arm.com> Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1 Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood Tested-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385 Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
60 lines
1.4 KiB
ArmAsm
60 lines
1.4 KiB
ArmAsm
/*
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* linux/arch/arm/vfp/entry.S
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*
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* Copyright (C) 2004 ARM Limited.
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* Written by Deep Blue Solutions Limited.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/thread_info.h>
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#include <asm/vfpmacros.h>
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#include <asm/assembler.h>
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#include <asm/asm-offsets.h>
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@ VFP entry point.
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@
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@ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)
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@ r2 = PC value to resume execution after successful emulation
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@ r9 = normal "successful" return address
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@ r10 = this threads thread_info structure
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@ lr = unrecognised instruction return address
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@ IRQs enabled.
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@
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ENTRY(do_vfp)
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inc_preempt_count r10, r4
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ldr r4, .LCvfp
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ldr r11, [r10, #TI_CPU] @ CPU number
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add r10, r10, #TI_VFPSTATE @ r10 = workspace
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ldr pc, [r4] @ call VFP entry point
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ENDPROC(do_vfp)
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ENTRY(vfp_null_entry)
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dec_preempt_count_ti r10, r4
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ret lr
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ENDPROC(vfp_null_entry)
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.align 2
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.LCvfp:
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.word vfp_vector
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@ This code is called if the VFP does not exist. It needs to flag the
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@ failure to the VFP initialisation code.
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__INIT
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ENTRY(vfp_testing_entry)
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dec_preempt_count_ti r10, r4
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ldr r0, VFP_arch_address
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str r0, [r0] @ set to non-zero value
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ret r9 @ we have handled the fault
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ENDPROC(vfp_testing_entry)
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.align 2
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VFP_arch_address:
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.word VFP_arch
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__FINIT
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